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target-arm: Add SCTLR_EL2
Backports commit b9cb5323bb671a0f2bfecc36168d3a3763e90261 from qemu
This commit is contained in:
parent
ca6a626ad6
commit
0374ab0421
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@ -2182,6 +2182,8 @@ static const ARMCPRegInfo v8_el3_no_el2_cp_reginfo[] = {
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PL2_RW, 0, NULL, 0 },
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PL2_RW, 0, NULL, 0 },
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{ "TCR_EL2", 0,2,0, 3,4,2, ARM_CP_STATE_BOTH, ARM_CP_CONST,
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{ "TCR_EL2", 0,2,0, 3,4,2, ARM_CP_STATE_BOTH, ARM_CP_CONST,
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PL2_RW, 0, NULL, 0 },
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PL2_RW, 0, NULL, 0 },
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{ "SCTLR_EL2", 0,1,0, 3,4,0, ARM_CP_STATE_BOTH, ARM_CP_CONST,
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PL2_RW, 0, NULL, 0 },
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REGINFO_SENTINEL
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REGINFO_SENTINEL
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};
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};
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@ -2242,6 +2244,9 @@ static const ARMCPRegInfo v8_el2_cp_reginfo[] = {
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{ "TCR_EL2", 0,2,0, 3,4,2, ARM_CP_STATE_BOTH, 0,
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{ "TCR_EL2", 0,2,0, 3,4,2, ARM_CP_STATE_BOTH, 0,
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PL2_RW, 0, NULL, 0, offsetof(CPUARMState, cp15.tcr_el[2]), {0, 0},
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PL2_RW, 0, NULL, 0, offsetof(CPUARMState, cp15.tcr_el[2]), {0, 0},
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NULL, NULL, vmsa_tcr_el1_write, NULL, raw_write, vmsa_ttbcr_reset },
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NULL, NULL, vmsa_tcr_el1_write, NULL, raw_write, vmsa_ttbcr_reset },
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{ "SCTLR_EL2", 0,1,0, 3,4,0, ARM_CP_STATE_BOTH, 0,
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PL2_RW, 0, NULL, 0, offsetof(CPUARMState, cp15.sctlr_el[2]), {0, 0},
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NULL, NULL, sctlr_write, NULL, raw_write },
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REGINFO_SENTINEL
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REGINFO_SENTINEL
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};
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};
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