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target-i386: emulate LOCK'ed XADD using atomic helper
Backports commit f53b01817f95781d2bcc8a82e057d1416601e13b from qemu
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@ -5784,19 +5784,24 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
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modrm = cpu_ldub_code(env, s->pc++);
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reg = ((modrm >> 3) & 7) | rex_r;
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mod = (modrm >> 6) & 3;
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gen_op_mov_v_reg(tcg_ctx, ot, cpu_T0, reg);
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if (mod == 3) {
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rm = (modrm & 7) | REX_B(s);
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gen_op_mov_v_reg(tcg_ctx, ot, cpu_T0, reg);
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gen_op_mov_v_reg(tcg_ctx, ot, cpu_T1, rm);
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tcg_gen_add_tl(tcg_ctx, cpu_T0, cpu_T0, cpu_T1);
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gen_op_mov_reg_v(tcg_ctx, ot, reg, cpu_T1);
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gen_op_mov_reg_v(tcg_ctx, ot, rm, cpu_T0);
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} else {
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gen_lea_modrm(env, s, modrm);
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gen_op_mov_v_reg(tcg_ctx, ot, cpu_T0, reg);
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gen_op_ld_v(s, ot, cpu_T1, cpu_A0);
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tcg_gen_add_tl(tcg_ctx, cpu_T0, cpu_T0, cpu_T1);
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gen_op_st_v(s, ot, cpu_T0, cpu_A0);
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if (s->prefix & PREFIX_LOCK) {
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tcg_gen_atomic_fetch_add_tl(tcg_ctx, cpu_T1, cpu_A0, cpu_T0,
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s->mem_index, ot | MO_LE);
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tcg_gen_add_tl(tcg_ctx, cpu_T0, cpu_T0, cpu_T1);
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} else {
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gen_op_ld_v(s, ot, cpu_T1, cpu_A0);
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tcg_gen_add_tl(tcg_ctx, cpu_T0, cpu_T0, cpu_T1);
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gen_op_st_v(s, ot, cpu_T0, cpu_A0);
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}
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gen_op_mov_reg_v(tcg_ctx, ot, reg, cpu_T1);
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}
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gen_op_update2_cc(tcg_ctx);
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