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https://github.com/yuzu-emu/unicorn.git
synced 2024-12-23 13:45:40 +00:00
Merge pull request #74 from mothran/fpip_update
Added FPU IP support to unicorn
This commit is contained in:
commit
0d78bb8d51
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@ -986,12 +986,22 @@ void helper_fstenv(CPUX86State *env, target_ulong ptr, int data32)
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}
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}
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}
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if (data32) {
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// DFLAG enum: tcg.h, case here to int
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if (env->hflags & HF_CS64_MASK) {
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cpu_stl_data(env, ptr, env->fpuc);
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cpu_stl_data(env, ptr + 4, fpus);
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cpu_stl_data(env, ptr + 8, fptag);
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cpu_stl_data(env, ptr + 12, env->fpip); /* fpip */
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cpu_stl_data(env, ptr + 20, 0); /* fpcs */
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cpu_stl_data(env, ptr + 24, 0); /* fpoo */
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cpu_stl_data(env, ptr + 28, 0); /* fpos */
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} else if (data32) {
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/* 32 bit */
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cpu_stl_data(env, ptr, env->fpuc);
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cpu_stl_data(env, ptr + 4, fpus);
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cpu_stl_data(env, ptr + 8, fptag);
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cpu_stl_data(env, ptr + 12, 0); /* fpip */
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cpu_stl_data(env, ptr + 12, env->fpip); /* fpip */
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cpu_stl_data(env, ptr + 16, 0); /* fpcs */
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cpu_stl_data(env, ptr + 20, 0); /* fpoo */
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cpu_stl_data(env, ptr + 24, 0); /* fpos */
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@ -1000,11 +1010,12 @@ void helper_fstenv(CPUX86State *env, target_ulong ptr, int data32)
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cpu_stw_data(env, ptr, env->fpuc);
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cpu_stw_data(env, ptr + 2, fpus);
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cpu_stw_data(env, ptr + 4, fptag);
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cpu_stw_data(env, ptr + 6, 0);
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cpu_stw_data(env, ptr + 6, env->fpip);
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cpu_stw_data(env, ptr + 8, 0);
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cpu_stw_data(env, ptr + 10, 0);
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cpu_stw_data(env, ptr + 12, 0);
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}
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}
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void helper_fldenv(CPUX86State *env, target_ulong ptr, int data32)
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@ -248,6 +248,11 @@ static void gen_update_cc_op(DisasContext *s)
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}
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}
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static void fpu_update_ip(CPUX86State *env, target_ulong pc)
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{
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env->fpip = pc;
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}
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#ifdef TARGET_X86_64
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#define NB_OP_SIZES 4
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@ -6110,6 +6115,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
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/* fcomp needs pop */
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gen_helper_fpop(tcg_ctx, cpu_env);
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}
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fpu_update_ip(env, pc_start);
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}
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break;
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case 0x08: /* flds */
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@ -6194,6 +6200,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
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gen_helper_fpop(tcg_ctx, cpu_env);
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break;
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}
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fpu_update_ip(env, pc_start);
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break;
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case 0x0c: /* fldenv mem */
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gen_update_cc_op(s);
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@ -6219,12 +6226,14 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
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gen_update_cc_op(s);
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gen_jmp_im(s, pc_start - s->cs_base);
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gen_helper_fldt_ST0(tcg_ctx, cpu_env, cpu_A0);
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fpu_update_ip(env, pc_start);
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break;
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case 0x1f: /* fstpt mem */
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gen_update_cc_op(s);
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gen_jmp_im(s, pc_start - s->cs_base);
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gen_helper_fstt_ST0(tcg_ctx, cpu_env, cpu_A0);
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gen_helper_fpop(tcg_ctx, cpu_env);
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fpu_update_ip(env, pc_start);
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break;
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case 0x2c: /* frstor mem */
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gen_update_cc_op(s);
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@ -6245,21 +6254,25 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
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gen_update_cc_op(s);
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gen_jmp_im(s, pc_start - s->cs_base);
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gen_helper_fbld_ST0(tcg_ctx, cpu_env, cpu_A0);
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fpu_update_ip(env, pc_start);
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break;
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case 0x3e: /* fbstp */
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gen_update_cc_op(s);
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gen_jmp_im(s, pc_start - s->cs_base);
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gen_helper_fbst_ST0(tcg_ctx, cpu_env, cpu_A0);
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gen_helper_fpop(tcg_ctx, cpu_env);
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fpu_update_ip(env, pc_start);
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break;
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case 0x3d: /* fildll */
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tcg_gen_qemu_ld_i64(s->uc, cpu_tmp1_i64, cpu_A0, s->mem_index, MO_LEQ);
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gen_helper_fildll_ST0(tcg_ctx, cpu_env, cpu_tmp1_i64);
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fpu_update_ip(env, pc_start);
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break;
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case 0x3f: /* fistpll */
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gen_helper_fistll_ST0(tcg_ctx, cpu_tmp1_i64, cpu_env);
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tcg_gen_qemu_st_i64(s->uc, cpu_tmp1_i64, cpu_A0, s->mem_index, MO_LEQ);
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gen_helper_fpop(tcg_ctx, cpu_env);
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fpu_update_ip(env, pc_start);
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break;
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default:
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goto illegal_op;
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@ -6574,6 +6587,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
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default:
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goto illegal_op;
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}
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fpu_update_ip(env, pc_start);
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}
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break;
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/************************/
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61
regress/fpu_ip.py
Executable file
61
regress/fpu_ip.py
Executable file
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@ -0,0 +1,61 @@
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#!/usr/bin/python
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from unicorn import *
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from unicorn.x86_const import *
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from capstone import *
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ESP = 0x2000
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PAGE_SIZE = 2 * 1024 * 1024
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# mov [esp], DWORD 0x37f
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# fldcw [esp]
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# fnop
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# fnstenv [esp + 8]
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# pop ecx
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CODE = b'\xc7\x04\x24\x7f\x03\x00\x00\xd9\x2c\x24\xd9\xd0\xd9\x74\x24\x08\x59'
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class SimpleEngine:
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def __init__(self):
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self.capmd = Cs(CS_ARCH_X86, CS_MODE_32)
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def disas_single(self, data):
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for i in self.capmd.disasm(data, 16):
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print("\t%s\t%s" % (i.mnemonic, i.op_str))
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break
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disasm = SimpleEngine()
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def hook_code(uc, addr, size, user_data):
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mem = uc.mem_read(addr, size)
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print(" 0x%X:" % (addr)),
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disasm.disas_single(str(mem))
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def mem_reader(addr, size):
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tmp = mu.mem_read(addr, size)
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for i in tmp:
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print(" 0x%x" % i),
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print("")
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mu = Uc(UC_ARCH_X86, UC_MODE_32)
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mu.mem_map(0x0, PAGE_SIZE)
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mu.mem_write(0x4000, CODE)
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mu.reg_write(UC_X86_REG_ESP, ESP)
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mu.hook_add(UC_HOOK_CODE, hook_code)
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mu.emu_start(0x4000, 0, 0, 5)
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esp = mu.reg_read(UC_X86_REG_ESP)
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print("value at ESP [0x%X - 4]: " % esp)
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mem_reader(esp + 14, 4)
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# EXPECTED OUTPUT:
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# 0x4000: mov dword ptr [esp], 0x37f
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# 0x4007: fldcw word ptr [esp]
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# 0x400A: fnop
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# 0x400C: fnstenv dword ptr [esp + 8]
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# 0x4010: pop ecx
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# value at ESP [0x2004 - 4]:
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# 0x0 0x0 0xa 0x40
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# ^ this value should match the fnop instuction addr
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62
regress/fpu_ip64.py
Normal file
62
regress/fpu_ip64.py
Normal file
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@ -0,0 +1,62 @@
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#!/usr/bin/python
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from unicorn import *
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from unicorn.x86_const import *
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from capstone import *
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ESP = 0x2000
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PAGE_SIZE = 2 * 1024 * 1024
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# mov [esp], DWORD 0x37f
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# fldcw [esp]
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# fnop
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# fnstenv [esp + 8]
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# pop ecx
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CODE = "C704247F030000D92C24D9D0D974240859".decode('hex')
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class SimpleEngine:
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def __init__(self):
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self.capmd = Cs(CS_ARCH_X86, CS_MODE_64)
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def disas_single(self, data):
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for i in self.capmd.disasm(data, 16):
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print("\t%s\t%s" % (i.mnemonic, i.op_str))
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break
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disasm = SimpleEngine()
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def hook_code(uc, addr, size, user_data):
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mem = uc.mem_read(addr, size)
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print(" 0x%X:" % (addr)),
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disasm.disas_single(str(mem))
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def mem_reader(addr, size):
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tmp = mu.mem_read(addr, size)
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for i in tmp:
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print(" 0x%x" % i),
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print("")
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mu = Uc(UC_ARCH_X86, UC_MODE_64)
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mu.mem_map(0x0, PAGE_SIZE)
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mu.mem_write(0x4000, CODE)
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mu.reg_write(UC_X86_REG_RSP, ESP)
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mu.hook_add(UC_HOOK_CODE, hook_code)
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mu.emu_start(0x4000, 0, 0, 5)
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rsp = mu.reg_read(UC_X86_REG_RSP)
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print("Value of FPIP: [0x%X]" % (rsp + 10))
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mem_reader(rsp + 10, 8)
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# EXPECTED OUTPUT:
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# 0x4000: mov dword ptr [rsp], 0x37f
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# 0x4007: fldcw word ptr [rsp]
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# 0x400A: fnop
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# 0x400C: fnstenv dword ptr [rsp + 8]
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# 0x4010: pop rcx
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# Value of FPIP: [0x2012]
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# 0x0 0x0 0xa 0x40 0x0 0x0 0x0 0x0
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# WHERE: the value of FPIP should be the address of fnop
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