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tcg: Add logical simplifications during gvec expand

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We handle many of these during integer expansion, and the
rest of them during integer optimization.

Backports commit 9a9eda78e4e56051485efb65e01748084f99ac3c from qemu
This commit is contained in:
Richard Henderson 2019-01-29 15:48:47 -05:00 committed by Lioncash
parent 4aaa75d05b
commit 11664d444e
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 30 additions and 5 deletions
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25
qemu/tcg/tcg-op-gvec.c
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@ -1841,8 +1841,13 @@ void tcg_gen_gvec_and(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs
.opc = INDEX_op_and_vec,
.prefer_i64 = TCG_TARGET_REG_BITS == 64,
};
if (aofs == bofs) {
tcg_gen_gvec_mov(s, vece, dofs, aofs, oprsz, maxsz);
} else {
tcg_gen_gvec_3(s, dofs, aofs, bofs, oprsz, maxsz, &g);
}
}
void tcg_gen_gvec_or(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs,
uint32_t bofs, uint32_t oprsz, uint32_t maxsz)
@ -1854,8 +1859,13 @@ void tcg_gen_gvec_or(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs,
.opc = INDEX_op_or_vec,
.prefer_i64 = TCG_TARGET_REG_BITS == 64,
};
if (aofs == bofs) {
tcg_gen_gvec_mov(s, vece, dofs, aofs, oprsz, maxsz);
} else {
tcg_gen_gvec_3(s, dofs, aofs, bofs, oprsz, maxsz, &g);
}
}
void tcg_gen_gvec_xor(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs,
uint32_t bofs, uint32_t oprsz, uint32_t maxsz)
@ -1867,8 +1877,13 @@ void tcg_gen_gvec_xor(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs
.opc = INDEX_op_xor_vec,
.prefer_i64 = TCG_TARGET_REG_BITS == 64,
};
if (aofs == bofs) {
tcg_gen_gvec_dup8i(s, dofs, oprsz, maxsz, 0);
} else {
tcg_gen_gvec_3(s, dofs, aofs, bofs, oprsz, maxsz, &g);
}
}
void tcg_gen_gvec_andc(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs,
uint32_t bofs, uint32_t oprsz, uint32_t maxsz)
@ -1880,8 +1895,13 @@ void tcg_gen_gvec_andc(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aof
.opc = INDEX_op_andc_vec,
.prefer_i64 = TCG_TARGET_REG_BITS == 64,
};
if (aofs == bofs) {
tcg_gen_gvec_dup8i(s, dofs, oprsz, maxsz, 0);
} else {
tcg_gen_gvec_3(s, dofs, aofs, bofs, oprsz, maxsz, &g);
}
}
void tcg_gen_gvec_orc(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs,
uint32_t bofs, uint32_t oprsz, uint32_t maxsz)
@ -1893,8 +1913,13 @@ void tcg_gen_gvec_orc(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs
.opc = INDEX_op_orc_vec,
.prefer_i64 = TCG_TARGET_REG_BITS == 64,
};
if (aofs == bofs) {
tcg_gen_gvec_dup8i(s, dofs, oprsz, maxsz, -1);
} else {
tcg_gen_gvec_3(s, dofs, aofs, bofs, oprsz, maxsz, &g);
}
}
static const GVecGen2s gop_ands = {
.fni8 = tcg_gen_and_i64,