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target/arm: Reset btype for direct branches
This is all of the non-exception cases of DISAS_NORETURN. Backports commit 358622703583d2e2967e0a93da990e747dcc3ac6 from qemu
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88193cf7c3
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@ -1434,6 +1434,7 @@ static void disas_uncond_b_imm(DisasContext *s, uint32_t insn)
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}
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/* B Branch / BL Branch with link */
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reset_btype(s);
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gen_goto_tb(s, 0, addr);
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}
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@ -1459,6 +1460,7 @@ static void disas_comp_b_imm(DisasContext *s, uint32_t insn)
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tcg_cmp = read_cpu_reg(s, rt, sf);
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label_match = gen_new_label(tcg_ctx);
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reset_btype(s);
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tcg_gen_brcondi_i64(tcg_ctx, op ? TCG_COND_NE : TCG_COND_EQ,
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tcg_cmp, 0, label_match);
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@ -1489,6 +1491,8 @@ static void disas_test_b_imm(DisasContext *s, uint32_t insn)
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tcg_cmp = tcg_temp_new_i64(tcg_ctx);
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tcg_gen_andi_i64(tcg_ctx, tcg_cmp, cpu_reg(s, rt), (1ULL << bit_pos));
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label_match = gen_new_label(tcg_ctx);
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reset_btype(s);
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tcg_gen_brcondi_i64(tcg_ctx, op ? TCG_COND_NE : TCG_COND_EQ,
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tcg_cmp, 0, label_match);
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tcg_temp_free_i64(tcg_ctx, tcg_cmp);
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@ -1516,6 +1520,7 @@ static void disas_cond_b_imm(DisasContext *s, uint32_t insn)
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addr = s->pc + sextract32(insn, 5, 19) * 4 - 4;
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cond = extract32(insn, 0, 4);
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reset_btype(s);
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if (cond < 0x0e) {
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/* genuinely conditional branches */
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TCGLabel *label_match = gen_new_label(tcg_ctx);
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@ -1678,6 +1683,7 @@ static void handle_sync(DisasContext *s, uint32_t insn,
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* a self-modified code correctly and also to take
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* any pending interrupts immediately.
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*/
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reset_btype(s);
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gen_goto_tb(s, 0, s->pc);
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return;
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default:
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