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target/mips: Add CP0 Config3 and Config5 fields to DisasContext structure

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Add CP0_Config3 and CP0_Config5 to DisasContext structure. This is
needed for implementing availability control of various instructions.

Backports commit ab77fc611bf004dfd25ecad5b2c11261e32012e9 from qemu
This commit is contained in:
Dimitrije Nikolic 2018-08-27 05:20:15 -04:00 committed by Lioncash
parent e18c921501
commit 128bfa00d2
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 4 additions and 0 deletions
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4
qemu/target/mips/translate.c
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@ -1435,6 +1435,8 @@ typedef struct DisasContext {
uint32_t opcode;
int insn_flags;
int32_t CP0_Config1;
int32_t CP0_Config3;
int32_t CP0_Config5;
/* Routine used to access memory */
int mem_idx;
TCGMemOp default_tcg_memop_mask;
@ -23466,6 +23468,8 @@ static void mips_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs)
ctx->saved_pc = -1;
ctx->insn_flags = env->insn_flags;
ctx->CP0_Config1 = env->CP0_Config1;
ctx->CP0_Config3 = env->CP0_Config3;
ctx->CP0_Config5 = env->CP0_Config5;
ctx->btarget = 0;
ctx->kscrexist = (env->CP0_Config4 >> CP0C4_KScrExist) & 0xff;
ctx->rxi = (env->CP0_Config3 >> CP0C3_RXI) & 1;