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target/mips: Add CP0 Config3 and Config5 fields to DisasContext structure
Add CP0_Config3 and CP0_Config5 to DisasContext structure. This is needed for implementing availability control of various instructions. Backports commit ab77fc611bf004dfd25ecad5b2c11261e32012e9 from qemu
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@ -1435,6 +1435,8 @@ typedef struct DisasContext {
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uint32_t opcode;
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uint32_t opcode;
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int insn_flags;
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int insn_flags;
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int32_t CP0_Config1;
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int32_t CP0_Config1;
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int32_t CP0_Config3;
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int32_t CP0_Config5;
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/* Routine used to access memory */
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/* Routine used to access memory */
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int mem_idx;
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int mem_idx;
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TCGMemOp default_tcg_memop_mask;
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TCGMemOp default_tcg_memop_mask;
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@ -23466,6 +23468,8 @@ static void mips_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs)
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ctx->saved_pc = -1;
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ctx->saved_pc = -1;
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ctx->insn_flags = env->insn_flags;
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ctx->insn_flags = env->insn_flags;
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ctx->CP0_Config1 = env->CP0_Config1;
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ctx->CP0_Config1 = env->CP0_Config1;
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ctx->CP0_Config3 = env->CP0_Config3;
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ctx->CP0_Config5 = env->CP0_Config5;
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ctx->btarget = 0;
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ctx->btarget = 0;
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ctx->kscrexist = (env->CP0_Config4 >> CP0C4_KScrExist) & 0xff;
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ctx->kscrexist = (env->CP0_Config4 >> CP0C4_KScrExist) & 0xff;
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ctx->rxi = (env->CP0_Config3 >> CP0C3_RXI) & 1;
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ctx->rxi = (env->CP0_Config3 >> CP0C3_RXI) & 1;
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