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tcg: Add tcg_gen_gvec_5_ptr

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Extend the vector generator infrastructure to handle
5 vector arguments.

Backports commit 2445971604c1cfd3ec484457159f4ac300fb04d2 from qemu
This commit is contained in:
Richard Henderson 2020-03-21 16:50:51 -04:00 committed by Lioncash
parent 6507fdb3b1
commit 12b4e01d9c
18 changed files with 56 additions and 0 deletions
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1
qemu/aarch64.h
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@ -2880,6 +2880,7 @@
#define tcg_gen_gvec_4_ool tcg_gen_gvec_4_ool_aarch64
#define tcg_gen_gvec_4_ptr tcg_gen_gvec_4_ptr_aarch64
#define tcg_gen_gvec_5_ool tcg_gen_gvec_5_ool_aarch64
#define tcg_gen_gvec_5_ptr tcg_gen_gvec_5_ptr_aarch64
#define tcg_gen_gvec_abs tcg_gen_gvec_abs_aarch64
#define tcg_gen_gvec_add tcg_gen_gvec_add_aarch64
#define tcg_gen_gvec_addi tcg_gen_gvec_addi_aarch64

1
qemu/aarch64eb.h
View file

@ -2880,6 +2880,7 @@
#define tcg_gen_gvec_4_ool tcg_gen_gvec_4_ool_aarch64eb
#define tcg_gen_gvec_4_ptr tcg_gen_gvec_4_ptr_aarch64eb
#define tcg_gen_gvec_5_ool tcg_gen_gvec_5_ool_aarch64eb
#define tcg_gen_gvec_5_ptr tcg_gen_gvec_5_ptr_aarch64eb
#define tcg_gen_gvec_abs tcg_gen_gvec_abs_aarch64eb
#define tcg_gen_gvec_add tcg_gen_gvec_add_aarch64eb
#define tcg_gen_gvec_addi tcg_gen_gvec_addi_aarch64eb

1
qemu/arm.h
View file

@ -2880,6 +2880,7 @@
#define tcg_gen_gvec_4_ool tcg_gen_gvec_4_ool_arm
#define tcg_gen_gvec_4_ptr tcg_gen_gvec_4_ptr_arm
#define tcg_gen_gvec_5_ool tcg_gen_gvec_5_ool_arm
#define tcg_gen_gvec_5_ptr tcg_gen_gvec_5_ptr_arm
#define tcg_gen_gvec_abs tcg_gen_gvec_abs_arm
#define tcg_gen_gvec_add tcg_gen_gvec_add_arm
#define tcg_gen_gvec_addi tcg_gen_gvec_addi_arm

1
qemu/armeb.h
View file

@ -2880,6 +2880,7 @@
#define tcg_gen_gvec_4_ool tcg_gen_gvec_4_ool_armeb
#define tcg_gen_gvec_4_ptr tcg_gen_gvec_4_ptr_armeb
#define tcg_gen_gvec_5_ool tcg_gen_gvec_5_ool_armeb
#define tcg_gen_gvec_5_ptr tcg_gen_gvec_5_ptr_armeb
#define tcg_gen_gvec_abs tcg_gen_gvec_abs_armeb
#define tcg_gen_gvec_add tcg_gen_gvec_add_armeb
#define tcg_gen_gvec_addi tcg_gen_gvec_addi_armeb

1
qemu/header_gen.py
View file

@ -2886,6 +2886,7 @@ symbols = (
'tcg_gen_gvec_4_ool',
'tcg_gen_gvec_4_ptr',
'tcg_gen_gvec_5_ool',
'tcg_gen_gvec_5_ptr',
'tcg_gen_gvec_abs',
'tcg_gen_gvec_add',
'tcg_gen_gvec_addi',

1
qemu/m68k.h
View file

@ -2880,6 +2880,7 @@
#define tcg_gen_gvec_4_ool tcg_gen_gvec_4_ool_m68k
#define tcg_gen_gvec_4_ptr tcg_gen_gvec_4_ptr_m68k
#define tcg_gen_gvec_5_ool tcg_gen_gvec_5_ool_m68k
#define tcg_gen_gvec_5_ptr tcg_gen_gvec_5_ptr_m68k
#define tcg_gen_gvec_abs tcg_gen_gvec_abs_m68k
#define tcg_gen_gvec_add tcg_gen_gvec_add_m68k
#define tcg_gen_gvec_addi tcg_gen_gvec_addi_m68k

1
qemu/mips.h
View file

@ -2880,6 +2880,7 @@
#define tcg_gen_gvec_4_ool tcg_gen_gvec_4_ool_mips
#define tcg_gen_gvec_4_ptr tcg_gen_gvec_4_ptr_mips
#define tcg_gen_gvec_5_ool tcg_gen_gvec_5_ool_mips
#define tcg_gen_gvec_5_ptr tcg_gen_gvec_5_ptr_mips
#define tcg_gen_gvec_abs tcg_gen_gvec_abs_mips
#define tcg_gen_gvec_add tcg_gen_gvec_add_mips
#define tcg_gen_gvec_addi tcg_gen_gvec_addi_mips

1
qemu/mips64.h
View file

@ -2880,6 +2880,7 @@
#define tcg_gen_gvec_4_ool tcg_gen_gvec_4_ool_mips64
#define tcg_gen_gvec_4_ptr tcg_gen_gvec_4_ptr_mips64
#define tcg_gen_gvec_5_ool tcg_gen_gvec_5_ool_mips64
#define tcg_gen_gvec_5_ptr tcg_gen_gvec_5_ptr_mips64
#define tcg_gen_gvec_abs tcg_gen_gvec_abs_mips64
#define tcg_gen_gvec_add tcg_gen_gvec_add_mips64
#define tcg_gen_gvec_addi tcg_gen_gvec_addi_mips64

1
qemu/mips64el.h
View file

@ -2880,6 +2880,7 @@
#define tcg_gen_gvec_4_ool tcg_gen_gvec_4_ool_mips64el
#define tcg_gen_gvec_4_ptr tcg_gen_gvec_4_ptr_mips64el
#define tcg_gen_gvec_5_ool tcg_gen_gvec_5_ool_mips64el
#define tcg_gen_gvec_5_ptr tcg_gen_gvec_5_ptr_mips64el
#define tcg_gen_gvec_abs tcg_gen_gvec_abs_mips64el
#define tcg_gen_gvec_add tcg_gen_gvec_add_mips64el
#define tcg_gen_gvec_addi tcg_gen_gvec_addi_mips64el

1
qemu/mipsel.h
View file

@ -2880,6 +2880,7 @@
#define tcg_gen_gvec_4_ool tcg_gen_gvec_4_ool_mipsel
#define tcg_gen_gvec_4_ptr tcg_gen_gvec_4_ptr_mipsel
#define tcg_gen_gvec_5_ool tcg_gen_gvec_5_ool_mipsel
#define tcg_gen_gvec_5_ptr tcg_gen_gvec_5_ptr_mipsel
#define tcg_gen_gvec_abs tcg_gen_gvec_abs_mipsel
#define tcg_gen_gvec_add tcg_gen_gvec_add_mipsel
#define tcg_gen_gvec_addi tcg_gen_gvec_addi_mipsel

1
qemu/powerpc.h
View file

@ -2880,6 +2880,7 @@
#define tcg_gen_gvec_4_ool tcg_gen_gvec_4_ool_powerpc
#define tcg_gen_gvec_4_ptr tcg_gen_gvec_4_ptr_powerpc
#define tcg_gen_gvec_5_ool tcg_gen_gvec_5_ool_powerpc
#define tcg_gen_gvec_5_ptr tcg_gen_gvec_5_ptr_powerpc
#define tcg_gen_gvec_abs tcg_gen_gvec_abs_powerpc
#define tcg_gen_gvec_add tcg_gen_gvec_add_powerpc
#define tcg_gen_gvec_addi tcg_gen_gvec_addi_powerpc

1
qemu/riscv32.h
View file

@ -2880,6 +2880,7 @@
#define tcg_gen_gvec_4_ool tcg_gen_gvec_4_ool_riscv32
#define tcg_gen_gvec_4_ptr tcg_gen_gvec_4_ptr_riscv32
#define tcg_gen_gvec_5_ool tcg_gen_gvec_5_ool_riscv32
#define tcg_gen_gvec_5_ptr tcg_gen_gvec_5_ptr_riscv32
#define tcg_gen_gvec_abs tcg_gen_gvec_abs_riscv32
#define tcg_gen_gvec_add tcg_gen_gvec_add_riscv32
#define tcg_gen_gvec_addi tcg_gen_gvec_addi_riscv32

1
qemu/riscv64.h
View file

@ -2880,6 +2880,7 @@
#define tcg_gen_gvec_4_ool tcg_gen_gvec_4_ool_riscv64
#define tcg_gen_gvec_4_ptr tcg_gen_gvec_4_ptr_riscv64
#define tcg_gen_gvec_5_ool tcg_gen_gvec_5_ool_riscv64
#define tcg_gen_gvec_5_ptr tcg_gen_gvec_5_ptr_riscv64
#define tcg_gen_gvec_abs tcg_gen_gvec_abs_riscv64
#define tcg_gen_gvec_add tcg_gen_gvec_add_riscv64
#define tcg_gen_gvec_addi tcg_gen_gvec_addi_riscv64

1
qemu/sparc.h
View file

@ -2880,6 +2880,7 @@
#define tcg_gen_gvec_4_ool tcg_gen_gvec_4_ool_sparc
#define tcg_gen_gvec_4_ptr tcg_gen_gvec_4_ptr_sparc
#define tcg_gen_gvec_5_ool tcg_gen_gvec_5_ool_sparc
#define tcg_gen_gvec_5_ptr tcg_gen_gvec_5_ptr_sparc
#define tcg_gen_gvec_abs tcg_gen_gvec_abs_sparc
#define tcg_gen_gvec_add tcg_gen_gvec_add_sparc
#define tcg_gen_gvec_addi tcg_gen_gvec_addi_sparc

1
qemu/sparc64.h
View file

@ -2880,6 +2880,7 @@
#define tcg_gen_gvec_4_ool tcg_gen_gvec_4_ool_sparc64
#define tcg_gen_gvec_4_ptr tcg_gen_gvec_4_ptr_sparc64
#define tcg_gen_gvec_5_ool tcg_gen_gvec_5_ool_sparc64
#define tcg_gen_gvec_5_ptr tcg_gen_gvec_5_ptr_sparc64
#define tcg_gen_gvec_abs tcg_gen_gvec_abs_sparc64
#define tcg_gen_gvec_add tcg_gen_gvec_add_sparc64
#define tcg_gen_gvec_addi tcg_gen_gvec_addi_sparc64

33
qemu/tcg/tcg-op-gvec.c
View file

@ -290,6 +290,39 @@ void tcg_gen_gvec_4_ptr(TCGContext *s, uint32_t dofs, uint32_t aofs, uint32_t bo
tcg_temp_free_i32(s, desc);
}
/* Generate a call to a gvec-style helper with five vector operands
and an extra pointer operand. */
void tcg_gen_gvec_5_ptr(TCGContext *s, uint32_t dofs, uint32_t aofs, uint32_t bofs,
uint32_t cofs, uint32_t eofs, TCGv_ptr ptr,
uint32_t oprsz, uint32_t maxsz, int32_t data,
gen_helper_gvec_5_ptr *fn)
{
TCGv_ptr a0, a1, a2, a3, a4;
TCGv_i32 desc = tcg_const_i32(s, simd_desc(oprsz, maxsz, data));
a0 = tcg_temp_new_ptr(s);
a1 = tcg_temp_new_ptr(s);
a2 = tcg_temp_new_ptr(s);
a3 = tcg_temp_new_ptr(s);
a4 = tcg_temp_new_ptr(s);
tcg_gen_addi_ptr(s, a0, s->cpu_env, dofs);
tcg_gen_addi_ptr(s, a1, s->cpu_env, aofs);
tcg_gen_addi_ptr(s, a2, s->cpu_env, bofs);
tcg_gen_addi_ptr(s, a3, s->cpu_env, cofs);
tcg_gen_addi_ptr(s, a4, s->cpu_env, eofs);
fn(s, a0, a1, a2, a3, a4, ptr, desc);
tcg_temp_free_ptr(s, a0);
tcg_temp_free_ptr(s, a1);
tcg_temp_free_ptr(s, a2);
tcg_temp_free_ptr(s, a3);
tcg_temp_free_ptr(s, a4);
tcg_temp_free_i32(s, desc);
}
/* Return true if we want to implement something of OPRSZ bytes
in units of LNSZ. This limits the expansion of inline code. */
static inline bool check_size_impl(uint32_t oprsz, uint32_t lnsz)

7
qemu/tcg/tcg-op-gvec.h
View file

@ -83,6 +83,13 @@ void tcg_gen_gvec_4_ptr(TCGContext *s, uint32_t dofs, uint32_t aofs, uint32_t bo
uint32_t maxsz, int32_t data,
gen_helper_gvec_4_ptr *fn);
typedef void gen_helper_gvec_5_ptr(TCGContext *, TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr,
TCGv_ptr, TCGv_ptr, TCGv_i32);
void tcg_gen_gvec_5_ptr(TCGContext *s, uint32_t dofs, uint32_t aofs, uint32_t bofs,
uint32_t cofs, uint32_t eofs, TCGv_ptr ptr,
uint32_t oprsz, uint32_t maxsz, int32_t data,
gen_helper_gvec_5_ptr *fn);
/* Expand a gvec operation. Either inline or out-of-line depending on
the actual vector size and the operations supported by the host. */
typedef struct {

1
qemu/x86_64.h
View file

@ -2880,6 +2880,7 @@
#define tcg_gen_gvec_4_ool tcg_gen_gvec_4_ool_x86_64
#define tcg_gen_gvec_4_ptr tcg_gen_gvec_4_ptr_x86_64
#define tcg_gen_gvec_5_ool tcg_gen_gvec_5_ool_x86_64
#define tcg_gen_gvec_5_ptr tcg_gen_gvec_5_ptr_x86_64
#define tcg_gen_gvec_abs tcg_gen_gvec_abs_x86_64
#define tcg_gen_gvec_add tcg_gen_gvec_add_x86_64
#define tcg_gen_gvec_addi tcg_gen_gvec_addi_x86_64