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target/arm: Mask PMOVSR writes based on supported counters

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This is an amendment to my earlier patch:
commit 7ece99b17e832065236c07a158dfac62619ef99b

Backports commit 599b71e277ac7e92807191b20b7163a28c5450ad from qemu
This commit is contained in:
Aaron Lindsay 2018-10-23 12:56:43 -04:00 committed by Lioncash
parent 10c6887e0b
commit 1596801693
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1 changed files with 1 additions and 0 deletions
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qemu/target/arm/helper.c
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@ -1043,6 +1043,7 @@ static void pmcntenclr_write(CPUARMState *env, const ARMCPRegInfo *ri,
static void pmovsr_write(CPUARMState *env, const ARMCPRegInfo *ri,
uint64_t value)
{
value &= pmu_counter_mask(env);
env->cp15.c9_pmovsr &= ~value;
}