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target/arm: Remove writefn from TTBR0_EL3

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The EL3 version of this register does not include an ASID,
and so the tlb_flush performed by vmsa_ttbr_write is not needed.

Backports commit f478847f1ee0df9397f561025ab2f687fd923571 from qemu
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Richard Henderson 2018-11-10 11:25:36 -05:00 committed by Lioncash
parent 1bcba0737e
commit 15a6b3f771
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 1 additions and 1 deletions
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qemu/target/arm/helper.c
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@ -3779,7 +3779,7 @@ static const ARMCPRegInfo el3_cp_reginfo[] = {
access_trap_aa32s_el1, NULL, vbar_write }, access_trap_aa32s_el1, NULL, vbar_write },
{ "TTBR0_EL3", 0,2,0, 3,6,0, ARM_CP_STATE_AA64,0, { "TTBR0_EL3", 0,2,0, 3,6,0, ARM_CP_STATE_AA64,0,
PL3_RW, 0, NULL, 0, offsetof(CPUARMState, cp15.ttbr0_el[3]), {0, 0}, PL3_RW, 0, NULL, 0, offsetof(CPUARMState, cp15.ttbr0_el[3]), {0, 0},
NULL, NULL, vmsa_ttbr_write }, NULL, NULL, NULL },
{ "TCR_EL3", 0,2,0, 3,6,2, ARM_CP_STATE_AA64,0, { "TCR_EL3", 0,2,0, 3,6,2, ARM_CP_STATE_AA64,0,
PL3_RW, 0, NULL, 0, offsetof(CPUARMState, cp15.tcr_el[3]), {0, 0}, PL3_RW, 0, NULL, 0, offsetof(CPUARMState, cp15.tcr_el[3]), {0, 0},
/* no .writefn needed as this can't cause an ASID change; /* no .writefn needed as this can't cause an ASID change;