mirror of
https://github.com/yuzu-emu/unicorn.git
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memory: try to inline constant-length reads
memcpy can take a large amount of time for small reads and writes. Handle the common case of reading s/g descriptors from memory (there is no corresponding "write" case that is as common, because writes often use address_space_st* functions) by inlining the relevant parts of address_space_read into the caller. Backports commit 3cc8f884996584630734a90c9b3c535af81e3c92 from qemu
This commit is contained in:
parent
712c300639
commit
1650af8c8b
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@ -94,6 +94,7 @@
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#define address_space_map address_space_map_aarch64
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#define address_space_read address_space_read_aarch64
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#define address_space_read_continue address_space_read_continue_aarch64
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#define address_space_read_full address_space_read_full_aarch64
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#define address_space_rw address_space_rw_aarch64
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#define address_space_translate address_space_translate_aarch64
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#define address_space_translate_for_iotlb address_space_translate_for_iotlb_aarch64
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@ -2040,7 +2041,6 @@
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#define mem_add mem_add_aarch64
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#define mem_begin mem_begin_aarch64
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#define mem_commit mem_commit_aarch64
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#define memory_access_is_direct memory_access_is_direct_aarch64
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#define memory_access_size memory_access_size_aarch64
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#define memory_init memory_init_aarch64
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#define memory_listener_match memory_listener_match_aarch64
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@ -94,6 +94,7 @@
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#define address_space_map address_space_map_aarch64eb
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#define address_space_read address_space_read_aarch64eb
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#define address_space_read_continue address_space_read_continue_aarch64eb
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#define address_space_read_full address_space_read_full_aarch64eb
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#define address_space_rw address_space_rw_aarch64eb
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#define address_space_translate address_space_translate_aarch64eb
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#define address_space_translate_for_iotlb address_space_translate_for_iotlb_aarch64eb
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@ -2040,7 +2041,6 @@
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#define mem_add mem_add_aarch64eb
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#define mem_begin mem_begin_aarch64eb
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#define mem_commit mem_commit_aarch64eb
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#define memory_access_is_direct memory_access_is_direct_aarch64eb
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#define memory_access_size memory_access_size_aarch64eb
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#define memory_init memory_init_aarch64eb
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#define memory_listener_match memory_listener_match_aarch64eb
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@ -94,6 +94,7 @@
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#define address_space_map address_space_map_arm
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#define address_space_read address_space_read_arm
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#define address_space_read_continue address_space_read_continue_arm
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#define address_space_read_full address_space_read_full_arm
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#define address_space_rw address_space_rw_arm
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#define address_space_translate address_space_translate_arm
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#define address_space_translate_for_iotlb address_space_translate_for_iotlb_arm
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@ -2040,7 +2041,6 @@
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#define mem_add mem_add_arm
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#define mem_begin mem_begin_arm
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#define mem_commit mem_commit_arm
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#define memory_access_is_direct memory_access_is_direct_arm
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#define memory_access_size memory_access_size_arm
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#define memory_init memory_init_arm
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#define memory_listener_match memory_listener_match_arm
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@ -94,6 +94,7 @@
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#define address_space_map address_space_map_armeb
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#define address_space_read address_space_read_armeb
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#define address_space_read_continue address_space_read_continue_armeb
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#define address_space_read_full address_space_read_full_armeb
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#define address_space_rw address_space_rw_armeb
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#define address_space_translate address_space_translate_armeb
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#define address_space_translate_for_iotlb address_space_translate_for_iotlb_armeb
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@ -2040,7 +2041,6 @@
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#define mem_add mem_add_armeb
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#define mem_begin mem_begin_armeb
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#define mem_commit mem_commit_armeb
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#define memory_access_is_direct memory_access_is_direct_armeb
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#define memory_access_size memory_access_size_armeb
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#define memory_init memory_init_armeb
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#define memory_listener_match memory_listener_match_armeb
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15
qemu/exec.c
15
qemu/exec.c
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@ -326,17 +326,6 @@ address_space_translate_internal(AddressSpaceDispatch *d, hwaddr addr, hwaddr *x
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return section;
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}
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static inline bool memory_access_is_direct(MemoryRegion *mr, bool is_write)
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{
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if (is_write) {
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return memory_region_is_ram(mr) && !mr->readonly;
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} else {
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return memory_region_is_ram(mr) || memory_region_is_romd(mr);
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}
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return false;
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}
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MemoryRegion *address_space_translate(AddressSpace *as, hwaddr addr,
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hwaddr *xlat, hwaddr *plen,
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bool is_write)
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@ -1970,8 +1959,8 @@ MemTxResult address_space_read_continue(AddressSpace *as, hwaddr addr,
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return result;
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}
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MemTxResult address_space_read(AddressSpace *as, hwaddr addr, MemTxAttrs attrs,
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uint8_t *buf, int len)
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MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr,
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MemTxAttrs attrs, uint8_t *buf, int len)
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{
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hwaddr l;
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hwaddr addr1;
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@ -100,6 +100,7 @@ symbols = (
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'address_space_map',
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'address_space_read',
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'address_space_read_continue',
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'address_space_read_full',
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'address_space_rw',
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'address_space_translate',
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'address_space_translate_for_iotlb',
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@ -2046,7 +2047,6 @@ symbols = (
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'mem_add',
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'mem_begin',
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'mem_commit',
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'memory_access_is_direct',
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'memory_access_size',
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'memory_init',
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'memory_listener_match',
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@ -946,21 +946,6 @@ MemTxResult address_space_write(AddressSpace *as, hwaddr addr,
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MemTxAttrs attrs,
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const uint8_t *buf, int len);
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/**
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* address_space_read: read from an address space.
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*
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* Return a MemTxResult indicating whether the operation succeeded
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* or failed (eg unassigned memory, device rejected the transaction,
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* IOMMU fault).
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*
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* @as: #AddressSpace to be accessed
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* @addr: address within that address space
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* @attrs: memory transaction attributes
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* @buf: buffer with the data transferred
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*/
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MemTxResult address_space_read(AddressSpace *as, hwaddr addr, MemTxAttrs attrs,
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uint8_t *buf, int len);
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/**
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* address_space_ld*: load from an address space
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* address_space_st*: store to an address space
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int len, hwaddr addr1, hwaddr l,
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MemoryRegion *mr);
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MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr,
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MemTxAttrs attrs, uint8_t *buf, int len);
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void *qemu_get_ram_ptr(struct uc_struct *uc, ram_addr_t addr);
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static inline bool memory_access_is_direct(MemoryRegion *mr, bool is_write)
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{
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if (is_write) {
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return memory_region_is_ram(mr) && !mr->readonly;
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} else {
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return memory_region_is_ram(mr) || memory_region_is_romd(mr);
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}
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return false;
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}
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/**
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* address_space_read: read from an address space.
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*
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* Return a MemTxResult indicating whether the operation succeeded
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* or failed (eg unassigned memory, device rejected the transaction,
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* IOMMU fault).
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*
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* @as: #AddressSpace to be accessed
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* @addr: address within that address space
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* @attrs: memory transaction attributes
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* @buf: buffer with the data transferred
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*/
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static inline
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MemTxResult address_space_read(AddressSpace *as, hwaddr addr, MemTxAttrs attrs,
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uint8_t *buf, int len)
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{
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MemTxResult result = MEMTX_OK;
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/* Unicorn: commented out
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hwaddr l, addr1;
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void *ptr;
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MemoryRegion *mr;
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if (__builtin_constant_p(len)) {
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if (len) {
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// Unicorn: commented out
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//rcu_read_lock();
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l = len;
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mr = address_space_translate(as, addr, &addr1, &l, false);
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if (len == l && memory_access_is_direct(mr, false)) {
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addr1 += memory_region_get_ram_addr(mr);
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ptr = qemu_get_ram_ptr(addr1);
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memcpy(buf, ptr, len);
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} else {
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result = address_space_read_continue(as, addr, attrs, buf, len,
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addr1, l, mr);
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}
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// Unicorn: commented out
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//rcu_read_unlock();
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}
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} else {*/
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result = address_space_read_full(as, addr, attrs, buf, len);
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//}
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return result;
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}
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#endif
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#endif
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@ -33,7 +33,6 @@ ram_addr_t qemu_ram_alloc_resizeable(ram_addr_t size, ram_addr_t max_size,
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MemoryRegion *mr, Error **errp);
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int qemu_get_ram_fd(struct uc_struct *uc, ram_addr_t addr);
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void *qemu_get_ram_block_host_ptr(struct uc_struct *uc, ram_addr_t addr);
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void *qemu_get_ram_ptr(struct uc_struct *uc, ram_addr_t addr);
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void qemu_ram_free(struct uc_struct *c, ram_addr_t addr);
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int qemu_ram_resize(struct uc_struct *c, ram_addr_t base, ram_addr_t newsize, Error **errp);
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#define address_space_map address_space_map_m68k
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#define address_space_read address_space_read_m68k
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#define address_space_read_continue address_space_read_continue_m68k
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#define address_space_read_full address_space_read_full_m68k
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#define address_space_rw address_space_rw_m68k
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#define address_space_translate address_space_translate_m68k
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#define address_space_translate_for_iotlb address_space_translate_for_iotlb_m68k
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#define mem_add mem_add_m68k
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#define mem_begin mem_begin_m68k
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#define mem_commit mem_commit_m68k
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#define memory_access_is_direct memory_access_is_direct_m68k
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#define memory_access_size memory_access_size_m68k
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#define memory_init memory_init_m68k
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#define memory_listener_match memory_listener_match_m68k
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#define address_space_map address_space_map_mips
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#define address_space_read address_space_read_mips
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#define address_space_read_continue address_space_read_continue_mips
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#define address_space_read_full address_space_read_full_mips
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#define address_space_rw address_space_rw_mips
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#define address_space_translate address_space_translate_mips
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#define address_space_translate_for_iotlb address_space_translate_for_iotlb_mips
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#define mem_add mem_add_mips
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#define mem_begin mem_begin_mips
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#define mem_commit mem_commit_mips
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#define memory_access_is_direct memory_access_is_direct_mips
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#define memory_access_size memory_access_size_mips
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#define memory_init memory_init_mips
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#define memory_listener_match memory_listener_match_mips
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#define address_space_map address_space_map_mips64
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#define address_space_read address_space_read_mips64
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#define address_space_read_continue address_space_read_continue_mips64
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#define address_space_read_full address_space_read_full_mips64
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#define address_space_rw address_space_rw_mips64
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#define address_space_translate address_space_translate_mips64
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#define address_space_translate_for_iotlb address_space_translate_for_iotlb_mips64
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#define mem_add mem_add_mips64
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#define mem_begin mem_begin_mips64
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#define mem_commit mem_commit_mips64
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#define memory_access_is_direct memory_access_is_direct_mips64
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#define memory_access_size memory_access_size_mips64
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#define memory_init memory_init_mips64
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#define memory_listener_match memory_listener_match_mips64
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#define address_space_map address_space_map_mips64el
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#define address_space_read address_space_read_mips64el
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#define address_space_read_continue address_space_read_continue_mips64el
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#define address_space_read_full address_space_read_full_mips64el
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#define address_space_rw address_space_rw_mips64el
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#define address_space_translate address_space_translate_mips64el
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#define address_space_translate_for_iotlb address_space_translate_for_iotlb_mips64el
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#define mem_add mem_add_mips64el
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#define mem_begin mem_begin_mips64el
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#define mem_commit mem_commit_mips64el
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#define memory_access_is_direct memory_access_is_direct_mips64el
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#define memory_access_size memory_access_size_mips64el
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#define memory_init memory_init_mips64el
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#define memory_listener_match memory_listener_match_mips64el
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#define address_space_map address_space_map_mipsel
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#define address_space_read address_space_read_mipsel
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#define address_space_read_continue address_space_read_continue_mipsel
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#define address_space_read_full address_space_read_full_mipsel
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#define address_space_rw address_space_rw_mipsel
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#define address_space_translate address_space_translate_mipsel
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#define address_space_translate_for_iotlb address_space_translate_for_iotlb_mipsel
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#define mem_add mem_add_mipsel
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#define mem_begin mem_begin_mipsel
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#define mem_commit mem_commit_mipsel
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#define memory_access_is_direct memory_access_is_direct_mipsel
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#define memory_access_size memory_access_size_mipsel
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#define memory_init memory_init_mipsel
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#define memory_listener_match memory_listener_match_mipsel
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#define address_space_map address_space_map_powerpc
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#define address_space_read address_space_read_powerpc
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#define address_space_read_continue address_space_read_continue_powerpc
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#define address_space_read_full address_space_read_full_powerpc
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#define address_space_rw address_space_rw_powerpc
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#define address_space_translate address_space_translate_powerpc
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#define address_space_translate_for_iotlb address_space_translate_for_iotlb_powerpc
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#define mem_add mem_add_powerpc
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#define mem_begin mem_begin_powerpc
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#define mem_commit mem_commit_powerpc
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#define memory_access_is_direct memory_access_is_direct_powerpc
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#define memory_access_size memory_access_size_powerpc
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#define memory_init memory_init_powerpc
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#define memory_listener_match memory_listener_match_powerpc
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#define address_space_map address_space_map_sparc
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#define address_space_read address_space_read_sparc
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#define address_space_read_continue address_space_read_continue_sparc
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#define address_space_read_full address_space_read_full_sparc
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#define address_space_rw address_space_rw_sparc
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#define address_space_translate address_space_translate_sparc
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#define address_space_translate_for_iotlb address_space_translate_for_iotlb_sparc
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#define mem_add mem_add_sparc
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#define mem_begin mem_begin_sparc
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#define mem_commit mem_commit_sparc
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#define memory_access_is_direct memory_access_is_direct_sparc
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#define memory_access_size memory_access_size_sparc
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#define memory_init memory_init_sparc
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#define memory_listener_match memory_listener_match_sparc
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#define address_space_map address_space_map_sparc64
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#define address_space_read address_space_read_sparc64
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#define address_space_read_continue address_space_read_continue_sparc64
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#define address_space_read_full address_space_read_full_sparc64
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#define address_space_rw address_space_rw_sparc64
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#define address_space_translate address_space_translate_sparc64
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#define address_space_translate_for_iotlb address_space_translate_for_iotlb_sparc64
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#define mem_add mem_add_sparc64
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#define mem_begin mem_begin_sparc64
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#define mem_commit mem_commit_sparc64
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#define memory_access_is_direct memory_access_is_direct_sparc64
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#define memory_access_size memory_access_size_sparc64
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#define memory_init memory_init_sparc64
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#define memory_listener_match memory_listener_match_sparc64
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#define address_space_map address_space_map_x86_64
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#define address_space_read address_space_read_x86_64
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#define address_space_read_continue address_space_read_continue_x86_64
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#define address_space_read_full address_space_read_full_x86_64
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#define address_space_rw address_space_rw_x86_64
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#define address_space_translate address_space_translate_x86_64
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#define address_space_translate_for_iotlb address_space_translate_for_iotlb_x86_64
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#define mem_add mem_add_x86_64
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#define mem_begin mem_begin_x86_64
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#define mem_commit mem_commit_x86_64
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#define memory_access_is_direct memory_access_is_direct_x86_64
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#define memory_access_size memory_access_size_x86_64
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#define memory_init memory_init_x86_64
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#define memory_listener_match memory_listener_match_x86_64
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