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i386: Introduce ARAT CPU feature

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ARAT signals that the APIC timer does not stop in power saving states.
As our APICs are emulated, it's fine to expose this feature to guests,
at least when asking for KVM host features or with CPU types that
include the flag. The exact model number that introduced the feature is
not known, but reports can be found that it's at least available since
Sandy Bridge.

Backports commit 28b8e4d0bf93ba176b4b7be819d537383c5a9060 from qemu
This commit is contained in:
Jan Kiszka 2018-02-14 16:28:05 -05:00 committed by Lioncash
parent d4b9f523d6
commit 16f8de7b4a
No known key found for this signature in database
GPG key ID: 4E3C3CC1031BA9C7
2 changed files with 48 additions and 1 deletions
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46
qemu/target-i386/cpu.c
View file

@ -252,6 +252,16 @@ static const char *cpuid_xsave_feature_name[] = {
NULL, NULL, NULL, NULL,
};
static const char *cpuid_6_feature_name[] = {
NULL, NULL, "arat", NULL,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL,
};
#define I486_FEATURES (CPUID_FP87 | CPUID_VME | CPUID_PSE)
#define PENTIUM_FEATURES (I486_FEATURES | CPUID_DE | CPUID_TSC | \
@ -308,6 +318,7 @@ static const char *cpuid_xsave_feature_name[] = {
CPUID_7_0_EBX_ERMS, CPUID_7_0_EBX_INVPCID, CPUID_7_0_EBX_RTM,
CPUID_7_0_EBX_RDSEED */
#define TCG_APM_FEATURES 0
#define TCG_6_EAX_FEATURES CPUID_6_EAX_ARAT
typedef struct FeatureWordInfo {
@ -392,6 +403,14 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
0,
0,
},
// FEAT_ARAT
{
cpuid_6_feature_name,
6,
false, 0,
R_EAX,
TCG_6_EAX_FEATURES,
}
#else
[FEAT_1_EDX] = {
.feat_names = feature_name,
@ -439,6 +458,11 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
.cpuid_reg = R_EAX,
.tcg_features = 0,
},
[FEAT_6_EAX] = {
.feat_names = cpuid_6_feature_name,
.cpuid_eax = 6, .cpuid_reg = R_EAX,
.tcg_features = TCG_6_EAX_FEATURES,
},
#endif
};
@ -985,6 +1009,18 @@ static X86CPUDefinition builtin_x86_defs[] = {
CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
// FEAT_8000_0001_ECX
CPUID_EXT3_LAHF_LM,
// FEAT_8000_0007_EDX
0,
// FEAT_C000_0001_EDX
0,
// FEAT_KVM
0,
// FEAT_SVM
0,
// FEAT_XSAVE
0,
// FEAT_ARAT
CPUID_6_EAX_ARAT,
},
"Westmere E56xx/L56xx/X56xx (Nehalem-C)",
},
@ -1023,6 +1059,8 @@ static X86CPUDefinition builtin_x86_defs[] = {
0,
// FEAT_XSAVE
CPUID_XSAVE_XSAVEOPT,
// FEAT_ARAT
CPUID_6_EAX_ARAT,
},
"Intel Xeon E312xx (Sandy Bridge)",
},
@ -1060,6 +1098,8 @@ static X86CPUDefinition builtin_x86_defs[] = {
0,
// FEAT_XSAVE
CPUID_XSAVE_XSAVEOPT,
// FEAT_ARAT
CPUID_6_EAX_ARAT,
},
"Intel Xeon E3-12xx v2 (Ivy Bridge)",
},
@ -1102,6 +1142,8 @@ static X86CPUDefinition builtin_x86_defs[] = {
0,
// FEAT_XSAVE
CPUID_XSAVE_XSAVEOPT,
// FEAT_ARAT
CPUID_6_EAX_ARAT,
},
"Intel Core Processor (Haswell)",
},
@ -1145,6 +1187,8 @@ static X86CPUDefinition builtin_x86_defs[] = {
0,
// FEAT_XSAVE
CPUID_XSAVE_XSAVEOPT,
// FEAT_ARAT
CPUID_6_EAX_ARAT,
},
"Intel Core Processor (Broadwell)",
},
@ -2077,7 +2121,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
break;
case 6:
/* Thermal and Power Leaf */
*eax = 0;
*eax = env->features[FEAT_6_EAX];
*ebx = 0;
*ecx = 0;
*edx = 0;

3
qemu/target-i386/cpu.h
View file

@ -417,6 +417,7 @@ typedef enum FeatureWord {
FEAT_KVM, /* CPUID[4000_0001].EAX (KVM_CPUID_FEATURES) */
FEAT_SVM, /* CPUID[8000_000A].EDX */
FEAT_XSAVE, /* CPUID[EAX=0xd,ECX=1].EAX */
FEAT_6_EAX, /* CPUID[6].EAX */
FEATURE_WORDS,
} FeatureWord;
@ -582,6 +583,8 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS];
#define CPUID_XSAVE_XGETBV1 (1U << 2)
#define CPUID_XSAVE_XSAVES (1U << 3)
#define CPUID_6_EAX_ARAT (1U << 2)
/* CPUID[0x80000007].EDX flags: */
#define CPUID_APM_INVTSC (1U << 8)