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tcg: Pass data argument to restore_state_to_opc

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The gen_opc_* arrays are already redundant with the data stored in
the insn_start arguments. Transition restore_state_to_opc to use
data from the latter.

Backports commit bad729e272387de7dbfa3ec4319036552fc6c107 from qemu
This commit is contained in:
Richard Henderson 2018-02-16 08:12:33 -05:00 committed by Lioncash
parent b115c5509d
commit 1cbd175736
No known key found for this signature in database
GPG key ID: 4E3C3CC1031BA9C7
9 changed files with 39 additions and 26 deletions
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2
qemu/include/exec/exec-all.h
View file

@ -74,7 +74,7 @@ typedef struct TranslationBlock TranslationBlock;
void gen_intermediate_code(CPUArchState *env, struct TranslationBlock *tb);
void gen_intermediate_code_pc(CPUArchState *env, struct TranslationBlock *tb);
void restore_state_to_opc(CPUArchState *env, struct TranslationBlock *tb,
int pc_pos);
target_ulong *data);
bool cpu_restore_state(CPUState *cpu, uintptr_t searched_pc);
void QEMU_NORETURN cpu_resume_from_signal(CPUState *cpu, void *puc);

10
qemu/target-arm/translate.c
View file

@ -11852,14 +11852,14 @@ void arm_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
}
#endif
void restore_state_to_opc(CPUARMState *env, TranslationBlock *tb, int pc_pos)
void restore_state_to_opc(CPUARMState *env, TranslationBlock *tb,
target_ulong *data)
{
TCGContext *tcg_ctx = env->uc->tcg_ctx;
if (is_a64(env)) {
env->pc = tcg_ctx->gen_opc_pc[pc_pos];
env->pc = data[0];
env->condexec_bits = 0;
} else {
env->regs[15] = tcg_ctx->gen_opc_pc[pc_pos];
env->condexec_bits = tcg_ctx->gen_opc_condexec_bits[pc_pos];
env->regs[15] = data[0];
env->condexec_bits = data[1];
}
}

12
qemu/target-i386/translate.c
View file

@ -8789,12 +8789,12 @@ void gen_intermediate_code_pc(CPUX86State *env, TranslationBlock *tb)
x86_env_get_cpu(env), tb, true);
}
void restore_state_to_opc(CPUX86State *env, TranslationBlock *tb, int pc_pos)
void restore_state_to_opc(CPUX86State *env, TranslationBlock *tb,
target_ulong *data)
{
int cc_op;
TCGContext *tcg_ctx = env->uc->tcg_ctx;
env->eip = tcg_ctx->gen_opc_pc[pc_pos] - tb->cs_base;
cc_op = tcg_ctx->gen_opc_cc_op[pc_pos];
if (cc_op != CC_OP_DYNAMIC)
int cc_op = data[1];
env->eip = data[0] - tb->cs_base;
if (cc_op != CC_OP_DYNAMIC) {
env->cc_op = cc_op;
}
}

5
qemu/target-m68k/translate.c
View file

@ -3213,8 +3213,9 @@ void gen_intermediate_code_pc(CPUM68KState *env, TranslationBlock *tb)
gen_intermediate_code_internal(m68k_env_get_cpu(env), tb, true);
}
void restore_state_to_opc(CPUM68KState *env, TranslationBlock *tb, int pc_pos)
void restore_state_to_opc(CPUM68KState *env, TranslationBlock *tb,
target_ulong *data)
{
TCGContext *tcg_ctx = env->uc->tcg_ctx;
env->pc = tcg_ctx->gen_opc_pc[pc_pos];
env->pc = data[0];
}

10
qemu/target-mips/translate.c
View file

@ -20253,19 +20253,19 @@ void cpu_state_reset(CPUMIPSState *env)
cs->exception_index = EXCP_NONE;
}
void restore_state_to_opc(CPUMIPSState *env, TranslationBlock *tb, int pc_pos)
void restore_state_to_opc(CPUMIPSState *env, TranslationBlock *tb,
target_ulong *data)
{
TCGContext *tcg_ctx = env->uc->tcg_ctx;
env->active_tc.PC = tcg_ctx->gen_opc_pc[pc_pos];
env->active_tc.PC = data[0];
env->hflags &= ~MIPS_HFLAG_BMASK;
env->hflags |= tcg_ctx->gen_opc_hflags[pc_pos];
env->hflags |= data[1];
switch (env->hflags & MIPS_HFLAG_BMASK_BASE) {
case MIPS_HFLAG_BR:
break;
case MIPS_HFLAG_BC:
case MIPS_HFLAG_BL:
case MIPS_HFLAG_B:
env->btarget = tcg_ctx->gen_opc_btarget[pc_pos];
env->btarget = data[2];
break;
}
}

11
qemu/target-sparc/translate.c
View file

@ -5707,12 +5707,13 @@ void gen_intermediate_code_init(CPUSPARCState *env)
uc->init_tcg = true;
}
void restore_state_to_opc(CPUSPARCState *env, TranslationBlock *tb, int pc_pos)
void restore_state_to_opc(CPUSPARCState *env, TranslationBlock *tb,
target_ulong *data)
{
TCGContext *tcg_ctx = env->uc->tcg_ctx;
target_ulong pc, npc;
env->pc = pc = tcg_ctx->gen_opc_pc[pc_pos];
npc = tcg_ctx->gen_opc_npc[pc_pos];
target_ulong pc = data[0];
target_ulong npc = data[1];
env->pc = pc;
if (npc == DYNAMIC_PC) {
/* dynamic NPC: already stored */
} else if (npc & JUMP_PC) {

11
qemu/tcg/tcg.c
View file

@ -2335,7 +2335,7 @@ static inline int tcg_gen_code_common(TCGContext *s,
tcg_insn_unit *gen_code_buf,
long search_pc)
{
int oi, oi_next;
int i, oi, oi_next;
#ifdef DEBUG_DISAS
if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) {
@ -2401,6 +2401,15 @@ static inline int tcg_gen_code_common(TCGContext *s,
tcg_reg_alloc_movi(s, args, dead_args, sync_args);
break;
case INDEX_op_insn_start:
for (i = 0; i < TARGET_INSN_START_WORDS; ++i) {
target_ulong a;
#if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
a = ((target_ulong)args[i * 2 + 1] << 32) | args[i * 2];
#else
a = args[i];
#endif
s->gen_opc_data[i] = a;
}
break;
case INDEX_op_discard:
temp_dead(s, args[0]);

2
qemu/tcg/tcg.h
View file

@ -712,6 +712,8 @@ struct TCGContext {
uint16_t gen_opc_icount[OPC_BUF_SIZE];
uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
target_ulong gen_opc_data[TARGET_INSN_START_WORDS];
// Unicorn engine variables
struct uc_struct *uc;
/* qemu/target-i386/translate.c: global register indexes */

2
qemu/translate-all.c
View file

@ -266,7 +266,7 @@ static int cpu_restore_state_from_tb(CPUState *cpu, TranslationBlock *tb,
}
cpu->icount_decr.u16.low -= s->gen_opc_icount[j];
restore_state_to_opc(env, tb, j);
restore_state_to_opc(env, tb, s->gen_opc_data);
#ifdef CONFIG_PROFILER
s->restore_time += profile_getclock() - ti;