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translate-a64: Backport fix for incorrect load/store exclusive unallocated checks
Backports commit e14f0eb12f920fd96b9f79d15cedd437648e8667 from qemu
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c25f059530
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@ -1783,9 +1783,6 @@ static void gen_store_exclusive(DisasContext *s, int rd, int rt, int rt2,
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* o2: 0 -> exclusive, 1 -> not
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* o2: 0 -> exclusive, 1 -> not
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* o1: 0 -> single register, 1 -> register pair
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* o1: 0 -> single register, 1 -> register pair
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* o0: 1 -> load-acquire/store-release, 0 -> not
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* o0: 1 -> load-acquire/store-release, 0 -> not
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*
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* o0 == 0 AND o2 == 1 is un-allocated
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* o1 == 1 is un-allocated except for 32 and 64 bit sizes
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*/
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*/
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static void disas_ldst_excl(DisasContext *s, uint32_t insn)
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static void disas_ldst_excl(DisasContext *s, uint32_t insn)
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{
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{
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@ -1801,7 +1798,8 @@ static void disas_ldst_excl(DisasContext *s, uint32_t insn)
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int size = extract32(insn, 30, 2);
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int size = extract32(insn, 30, 2);
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TCGv_i64 tcg_addr;
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TCGv_i64 tcg_addr;
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if ((!is_excl && !is_lasr) ||
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if ((!is_excl && !is_pair && !is_lasr) ||
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(!is_excl && is_pair) ||
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(is_pair && size < 2)) {
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(is_pair && size < 2)) {
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unallocated_encoding(s);
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unallocated_encoding(s);
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return;
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return;
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@ -1830,15 +1828,6 @@ static void disas_ldst_excl(DisasContext *s, uint32_t insn)
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} else {
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} else {
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do_gpr_ld(s, tcg_rt, tcg_addr, size, false, false);
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do_gpr_ld(s, tcg_rt, tcg_addr, size, false, false);
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}
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}
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if (is_pair) {
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TCGv_i64 tcg_rt2 = cpu_reg(s, rt);
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tcg_gen_addi_i64(tcg_ctx, tcg_addr, tcg_addr, 1ULL << size);
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if (is_store) {
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do_gpr_st(s, tcg_rt2, tcg_addr, size);
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} else {
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do_gpr_ld(s, tcg_rt2, tcg_addr, size, false, false);
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}
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}
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}
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}
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}
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}
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