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target/arm: Simplify op_smlaxxx for SMLAL*
Since all of the inputs and outputs are i32, dispense with the intermediate promotion to i64 and use tcg_gen_add2_i32. Backports commit ea96b374641bc429269096d88d4e91ee544273e9 from qemu
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@ -8398,8 +8398,7 @@ static bool op_smlaxxx(DisasContext *s, arg_rrrr *a,
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int add_long, bool nt, bool mt)
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{
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TCGContext *tcg_ctx = s->uc->tcg_ctx;
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TCGv_i32 t0, t1;
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TCGv_i64 t64;
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TCGv_i32 t0, t1, tl, th;
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if (s->thumb
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? !arm_dc_feature(s, ARM_FEATURE_THUMB_DSP)
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@ -8423,12 +8422,14 @@ static bool op_smlaxxx(DisasContext *s, arg_rrrr *a,
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store_reg(s, a->rd, t0);
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break;
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case 2:
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t64 = tcg_temp_new_i64(tcg_ctx);
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tcg_gen_ext_i32_i64(tcg_ctx, t64, t0);
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tl = load_reg(s, a->ra);
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th = load_reg(s, a->rd);
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t1 = tcg_const_i32(tcg_ctx, 0);
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tcg_gen_add2_i32(tcg_ctx, tl, th, tl, th, t0, t1);
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tcg_temp_free_i32(tcg_ctx, t0);
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gen_addq(s, t64, a->ra, a->rd);
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gen_storeq_reg(s, a->ra, a->rd, t64);
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tcg_temp_free_i64(tcg_ctx, t64);
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tcg_temp_free_i32(tcg_ctx, t1);
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store_reg(s, a->ra, tl);
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store_reg(s, a->rd, th);
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break;
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default:
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g_assert_not_reached();
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