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target/arm: Simplify op_smlaxxx for SMLAL*

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Since all of the inputs and outputs are i32, dispense with
the intermediate promotion to i64 and use tcg_gen_add2_i32.

Backports commit ea96b374641bc429269096d88d4e91ee544273e9 from qemu
This commit is contained in:
Richard Henderson 2019-11-19 14:11:47 -05:00 committed by Lioncash
parent 543b598d45
commit 201be7b8b1
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 8 additions and 7 deletions
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15
qemu/target/arm/translate.c
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@ -8398,8 +8398,7 @@ static bool op_smlaxxx(DisasContext *s, arg_rrrr *a,
int add_long, bool nt, bool mt) int add_long, bool nt, bool mt)
{ {
TCGContext *tcg_ctx = s->uc->tcg_ctx; TCGContext *tcg_ctx = s->uc->tcg_ctx;
TCGv_i32 t0, t1; TCGv_i32 t0, t1, tl, th;
TCGv_i64 t64;
if (s->thumb if (s->thumb
? !arm_dc_feature(s, ARM_FEATURE_THUMB_DSP) ? !arm_dc_feature(s, ARM_FEATURE_THUMB_DSP)
@ -8423,12 +8422,14 @@ static bool op_smlaxxx(DisasContext *s, arg_rrrr *a,
store_reg(s, a->rd, t0); store_reg(s, a->rd, t0);
break; break;
case 2: case 2:
t64 = tcg_temp_new_i64(tcg_ctx); tl = load_reg(s, a->ra);
tcg_gen_ext_i32_i64(tcg_ctx, t64, t0); th = load_reg(s, a->rd);
t1 = tcg_const_i32(tcg_ctx, 0);
tcg_gen_add2_i32(tcg_ctx, tl, th, tl, th, t0, t1);
tcg_temp_free_i32(tcg_ctx, t0); tcg_temp_free_i32(tcg_ctx, t0);
gen_addq(s, t64, a->ra, a->rd); tcg_temp_free_i32(tcg_ctx, t1);
gen_storeq_reg(s, a->ra, a->rd, t64); store_reg(s, a->ra, tl);
tcg_temp_free_i64(tcg_ctx, t64); store_reg(s, a->rd, th);
break; break;
default: default:
g_assert_not_reached(); g_assert_not_reached();