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https://github.com/yuzu-emu/unicorn.git
synced 2025-03-23 06:25:12 +00:00
tcg: Perform comparison pass with qemu
Makes formatting and code consistent with qemu
This commit is contained in:
Lioncash
parent
95d50a02a1
commit
21b0afe218
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@ -120,7 +120,6 @@ static bool tcg_out_sti(TCGContext *s, TCGType type, TCGArg val,
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static void tcg_out_call(TCGContext *s, tcg_insn_unit *target);
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static int tcg_target_const_match(tcg_target_long val, TCGType type,
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const TCGArgConstraint *arg_ct);
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#ifdef TCG_TARGET_NEED_LDST_LABELS
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static bool tcg_out_ldst_finalize(TCGContext *s);
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#endif
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@ -218,7 +217,7 @@ static void tcg_out_reloc(TCGContext *s, tcg_insn_unit *code_ptr, int type,
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if (l->has_value) {
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/* FIXME: This may break relocations on RISC targets that
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modify instruction fields in place. The caller may not have
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modify instruction fields in place. The caller may not have
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written the initial value. */
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patch_reloc(code_ptr, type, l->u.value, addend);
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} else {
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@ -1222,6 +1221,7 @@ void tcg_gen_callN(TCGContext *s, void *func, TCGTemp *ret, int nargs, TCGTemp *
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/* Make sure the fields didn't overflow. */
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tcg_debug_assert(TCGOP_CALLI(op) == real_args);
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tcg_debug_assert(pi <= ARRAY_SIZE(op->args));
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#if defined(__sparc__) && !defined(__arch64__) \
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&& !defined(CONFIG_TCG_INTERPRETER)
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/* Free all of the parts we allocated above. */
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@ -1256,6 +1256,7 @@ static void tcg_reg_alloc_start(TCGContext *s)
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{
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int i, n;
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TCGTemp *ts;
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for (i = 0, n = s->nb_globals; i < n; i++) {
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ts = &s->temps[i];
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ts->val_type = (ts->fixed_reg ? TEMP_VAL_REG : TEMP_VAL_MEM);
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@ -1427,7 +1428,6 @@ void tcg_dump_ops(TCGContext *s)
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for (i = 0; i < TARGET_INSN_START_WORDS; ++i) {
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target_ulong a;
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#if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
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a = deposit64(op->args[i * 2], 32, 32, op->args[i * 2 + 1]);
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#else
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@ -1441,11 +1441,6 @@ void tcg_dump_ops(TCGContext *s)
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nb_iargs = TCGOP_CALLI(op);
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nb_cargs = def->nb_cargs;
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if (def->flags & TCG_OPF_VECTOR) {
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col += qemu_log("v%d,e%d,", 64 << TCGOP_VECL(op),
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8 << TCGOP_VECE(op));
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}
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/* function name, flags, out args */
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col += qemu_log(" %s %s,$0x%" TCG_PRIlx ",$%d", def->name,
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tcg_find_helper(s, op->args[nb_oargs + nb_iargs]),
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@ -1469,6 +1464,11 @@ void tcg_dump_ops(TCGContext *s)
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nb_iargs = def->nb_iargs;
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nb_cargs = def->nb_cargs;
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if (def->flags & TCG_OPF_VECTOR) {
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col += qemu_log("v%d,e%d,", 64 << TCGOP_VECL(op),
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8 << TCGOP_VECE(op));
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}
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k = 0;
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for (i = 0; i < nb_oargs; i++) {
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if (k != 0) {
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@ -1706,7 +1706,7 @@ void tcg_op_remove(TCGContext *s, TCGOp *op)
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QTAILQ_INSERT_TAIL(&s->free_ops, op, link);
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#ifdef CONFIG_PROFILER
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s->del_op_count++;
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atomic_set(&s->prof.del_op_count, s->prof.del_op_count + 1);
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#endif
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}
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@ -1722,6 +1722,7 @@ static TCGOp *tcg_op_alloc(TCGContext *s, TCGOpcode opc)
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}
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memset(op, 0, offsetof(TCGOp, link));
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op->opc = opc;
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return op;
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}
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@ -1821,11 +1822,10 @@ static void liveness_pass_1(TCGContext *s)
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bool have_opc_new2;
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TCGLifeData arg_life = 0;
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TCGTemp *arg_ts;
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TCGOpcode opc = op->opc;
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const TCGOpDef *def = &s->tcg_op_defs[opc];
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switch(opc) {
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switch (opc) {
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case INDEX_op_call:
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{
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int call_flags;
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@ -1961,7 +1961,7 @@ static void liveness_pass_1(TCGContext *s)
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op->args[1] = op->args[2];
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op->args[2] = op->args[3];
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} else if (arg_temp(op->args[0])->state == TS_DEAD && have_opc_new2) {
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/* The low part of the operation is dead; generate the high. */
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/* The low part of the operation is dead; generate the high. */
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op->opc = opc = opc_new2;
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op->args[0] = op->args[1];
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op->args[1] = op->args[2];
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@ -2491,6 +2491,7 @@ static void tcg_reg_alloc_do_movi(TCGContext *s, TCGTemp *ots,
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tcg_out_movi(s, ots->type, ots->reg, val);
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return;
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}
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/* The movi is not explicitly generated here. */
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if (ots->val_type == TEMP_VAL_REG) {
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s->reg_to_temp[ots->reg] = NULL;
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@ -2604,14 +2605,14 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
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nb_iargs = def->nb_iargs;
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/* copy constants */
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memcpy(new_args + nb_oargs + nb_iargs,
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memcpy(new_args + nb_oargs + nb_iargs,
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op->args + nb_oargs + nb_iargs,
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sizeof(TCGArg) * def->nb_cargs);
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i_allocated_regs = s->reserved_regs;
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o_allocated_regs = s->reserved_regs;
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/* satisfy input constraints */
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/* satisfy input constraints */
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for (k = 0; k < nb_iargs; k++) {
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i = def->sorted_args[nb_oargs + k];
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arg = op->args[i];
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@ -2658,7 +2659,7 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
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/* nothing to do : the constraint is satisfied */
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} else {
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allocate_in_reg:
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/* allocate a new register matching the constraint
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/* allocate a new register matching the constraint
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and move the temporary register into it */
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reg = tcg_reg_alloc(s, arg_ct->u.regs, i_allocated_regs,
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ts->indirect_base);
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@ -2669,7 +2670,7 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
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tcg_regset_set_reg(i_allocated_regs, reg);
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iarg_end: ;
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}
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/* mark dead temporaries and free the associated registers */
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for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
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if (IS_DEAD_ARG(i)) {
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@ -2681,7 +2682,7 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
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tcg_reg_alloc_bb_end(s, i_allocated_regs);
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} else {
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if (def->flags & TCG_OPF_CALL_CLOBBER) {
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/* XXX: permit generic clobber register list ? */
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/* XXX: permit generic clobber register list ? */
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for (i = 0; i < TCG_TARGET_NB_REGS; i++) {
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if (tcg_regset_test_reg(s->tcg_target_call_clobber_regs, i)) {
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tcg_reg_free(s, i, i_allocated_regs);
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@ -2693,7 +2694,7 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
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an exception. */
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sync_globals(s, i_allocated_regs);
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}
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/* satisfy the output constraints */
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for(k = 0; k < nb_oargs; k++) {
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i = def->sorted_args[k];
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@ -2818,7 +2819,7 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp *op)
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stack_offset += sizeof(tcg_target_long);
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#endif
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}
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/* assign input registers */
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allocated_regs = s->reserved_regs;
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for (i = 0; i < nb_regs; i++) {
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@ -2842,16 +2843,16 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp *op)
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tcg_regset_set_reg(allocated_regs, reg);
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}
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}
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/* mark dead temporaries and free the associated registers */
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for (i = nb_oargs; i < nb_iargs + nb_oargs; i++) {
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if (IS_DEAD_ARG(i)) {
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temp_dead(s, arg_temp(op->args[i]));
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}
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}
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/* clobber call registers */
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for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
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for (i = 0; i < TCG_TARGET_NB_REGS; i++) {
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if (tcg_regset_test_reg(s->tcg_target_call_clobber_regs, i)) {
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tcg_reg_free(s, i, allocated_regs);
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}
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@ -3063,7 +3064,6 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb)
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return -1;
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}
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}
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tcg_debug_assert(num_insns >= 0);
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s->gen_insn_end_off[num_insns] = tcg_current_code_size(s);
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