target/arm: Export aa64_va_parameters to internals.h

We need to reuse this from helper-a64.c. Provide a stub
definition for CONFIG_USER_ONLY. This matches the stub
definitions that we removed for arm_regime_tbi{0,1} before.

Backports commit bf0be433878935e824479e8ae890493e1fb646ed from qemu
This commit is contained in:
Richard Henderson 2019-01-22 16:22:50 -05:00 committed by Lioncash
parent 3fbde0ab73
commit 23b162f2fb
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7 changed files with 26 additions and 2 deletions

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@ -3271,6 +3271,7 @@
#define xscale_cp_reginfo xscale_cp_reginfo_aarch64
#define xscale_cpar_write xscale_cpar_write_aarch64
#define ARM64_REGS_STORAGE_SIZE ARM64_REGS_STORAGE_SIZE_aarch64
#define aa64_va_parameters aa64_va_parameters_aarch64
#define aarch64_cpu_do_interrupt aarch64_cpu_do_interrupt_aarch64
#define aarch64_cpu_register_types aarch64_cpu_register_types_aarch64
#define aarch64_sve_change_el aarch64_sve_change_el_aarch64

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@ -3271,6 +3271,7 @@
#define xscale_cp_reginfo xscale_cp_reginfo_aarch64eb
#define xscale_cpar_write xscale_cpar_write_aarch64eb
#define ARM64_REGS_STORAGE_SIZE ARM64_REGS_STORAGE_SIZE_aarch64eb
#define aa64_va_parameters aa64_va_parameters_aarch64eb
#define aarch64_cpu_do_interrupt aarch64_cpu_do_interrupt_aarch64eb
#define aarch64_cpu_register_types aarch64_cpu_register_types_aarch64eb
#define aarch64_sve_change_el aarch64_sve_change_el_aarch64eb

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@ -3270,6 +3270,7 @@
#define xpsr_write xpsr_write_arm
#define xscale_cp_reginfo xscale_cp_reginfo_arm
#define xscale_cpar_write xscale_cpar_write_arm
#define aa64_va_parameters aa64_va_parameters_arm
#define aarch64_translator_ops aarch64_translator_ops_arm
#define arm_v7m_mmu_idx_for_secstate arm_v7m_mmu_idx_for_secstate_arm
#define arm_v7m_mmu_idx_for_secstate_and_priv arm_v7m_mmu_idx_for_secstate_and_priv_arm

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@ -3270,6 +3270,7 @@
#define xpsr_write xpsr_write_armeb
#define xscale_cp_reginfo xscale_cp_reginfo_armeb
#define xscale_cpar_write xscale_cpar_write_armeb
#define aa64_va_parameters aa64_va_parameters_armeb
#define aarch64_translator_ops aarch64_translator_ops_armeb
#define arm_v7m_mmu_idx_for_secstate arm_v7m_mmu_idx_for_secstate_armeb
#define arm_v7m_mmu_idx_for_secstate_and_priv arm_v7m_mmu_idx_for_secstate_and_priv_armeb

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@ -3279,6 +3279,7 @@ symbols = (
)
arm_symbols = (
'aa64_va_parameters',
'aarch64_translator_ops',
'arm_v7m_mmu_idx_for_secstate',
'arm_v7m_mmu_idx_for_secstate_and_priv',
@ -3310,6 +3311,7 @@ arm_symbols = (
aarch64_symbols = (
'ARM64_REGS_STORAGE_SIZE',
'aa64_va_parameters',
'aarch64_cpu_do_interrupt',
'aarch64_cpu_register_types',
'aarch64_sve_change_el',

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@ -8948,8 +8948,8 @@ static uint8_t convert_stage2_attrs(CPUARMState *env, uint8_t s2attrs)
return (hiattr << 6) | (hihint << 4) | (loattr << 2) | lohint;
}
static ARMVAParameters aa64_va_parameters(CPUARMState *env, uint64_t va,
ARMMMUIdx mmu_idx, bool data)
ARMVAParameters aa64_va_parameters(CPUARMState *env, uint64_t va,
ARMMMUIdx mmu_idx, bool data)
{
uint64_t tcr = regime_tcr(env, mmu_idx)->raw_tcr;
uint32_t el = regime_el(env, mmu_idx);

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@ -958,4 +958,22 @@ typedef struct ARMVAParameters {
bool using64k : 1;
} ARMVAParameters;
#ifdef CONFIG_USER_ONLY
static inline ARMVAParameters aa64_va_parameters(CPUARMState *env,
uint64_t va,
ARMMMUIdx mmu_idx, bool data)
{
ARMVAParameters result = {0};
/* 48-bit address space */
result.tsz = 16;
/* We can't handle tagged addresses properly in user-only mode */
result.tbi = false;
return result;
}
#else
ARMVAParameters aa64_va_parameters(CPUARMState *env, uint64_t va,
ARMMMUIdx mmu_idx, bool data);
#endif
#endif