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target/arm: Use the float-to-int-scale softfloat routines

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Backports commit 323cd490845acf663159ca26e35cb977ad9b85a2 from qemu
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Richard Henderson 2018-08-25 04:10:49 -04:00 committed by Lioncash
parent 7d3ad3e053
commit 241fb78efc
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 51 additions and 50 deletions
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93
qemu/target/arm/helper.c
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@ -10799,38 +10799,28 @@ float##fsz HELPER(vfp_##name##to##p)(uint##isz##_t x, uint32_t shift, \
void *fpstp) \ void *fpstp) \
{ return itype##_to_##float##fsz##_scalbn(x, -shift, fpstp); } { return itype##_to_##float##fsz##_scalbn(x, -shift, fpstp); }
/* Notice that we want only input-denormal exception flags from the #define VFP_CONV_FLOAT_FIX_ROUND(name, p, fsz, isz, itype, ROUND, suff) \
* scalbn operation: the other possible flags (overflow+inexact if uint##isz##_t HELPER(vfp_to##name##p##suff)(float##fsz x, uint32_t shift, \
* we overflow to infinity, output-denormal) aren't correct for the void *fpst) \
* complete scale-and-convert operation.
*/
#define VFP_CONV_FLOAT_FIX_ROUND(name, p, fsz, isz, itype, round) \
uint##isz##_t HELPER(vfp_to##name##p##round)(float##fsz x, \
uint32_t shift, \
void *fpstp) \
{ \ { \
float_status *fpst = fpstp; \ if (unlikely(float##fsz##_is_any_nan(x))) { \
int old_exc_flags = get_float_exception_flags(fpst); \
float##fsz tmp; \
if (float##fsz##_is_any_nan(x)) { \
float_raise(float_flag_invalid, fpst); \ float_raise(float_flag_invalid, fpst); \
return 0; \ return 0; \
} \ } \
tmp = float##fsz##_scalbn(x, shift, fpst); \ return float##fsz##_to_##itype##_scalbn(x, ROUND, shift, fpst); \
old_exc_flags |= get_float_exception_flags(fpst) \
& float_flag_input_denormal; \
set_float_exception_flags(old_exc_flags, fpst); \
return float##fsz##_to_##itype##round(tmp, fpst); \
} }
#define VFP_CONV_FIX(name, p, fsz, isz, itype) \ #define VFP_CONV_FIX(name, p, fsz, isz, itype) \
VFP_CONV_FIX_FLOAT(name, p, fsz, isz, itype) \ VFP_CONV_FIX_FLOAT(name, p, fsz, isz, itype) \
VFP_CONV_FLOAT_FIX_ROUND(name, p, fsz, isz, itype, _round_to_zero) \ VFP_CONV_FLOAT_FIX_ROUND(name, p, fsz, isz, itype, \
VFP_CONV_FLOAT_FIX_ROUND(name, p, fsz, isz, itype, ) float_round_to_zero, _round_to_zero) \
VFP_CONV_FLOAT_FIX_ROUND(name, p, fsz, isz, itype, \
get_float_rounding_mode(fpst), )
#define VFP_CONV_FIX_A64(name, p, fsz, isz, itype) \ #define VFP_CONV_FIX_A64(name, p, fsz, isz, itype) \
VFP_CONV_FIX_FLOAT(name, p, fsz, isz, itype) \ VFP_CONV_FIX_FLOAT(name, p, fsz, isz, itype) \
VFP_CONV_FLOAT_FIX_ROUND(name, p, fsz, isz, itype, ) VFP_CONV_FLOAT_FIX_ROUND(name, p, fsz, isz, itype, \
get_float_rounding_mode(fpst), )
VFP_CONV_FIX(sh, d, 64, 64, int16) VFP_CONV_FIX(sh, d, 64, 64, int16)
VFP_CONV_FIX(sl, d, 64, 64, int32) VFP_CONV_FIX(sl, d, 64, 64, int32)
@ -10870,53 +10860,64 @@ uint32_t HELPER(vfp_uqtoh)(uint64_t x, uint32_t shift, void *fpst)
return uint64_to_float16_scalbn(x, -shift, fpst); return uint64_to_float16_scalbn(x, -shift, fpst);
} }
static float64 do_prescale_fp16(float16 f, int shift, float_status *fpst)
{
if (unlikely(float16_is_any_nan(f))) {
float_raise(float_flag_invalid, fpst);
return 0;
} else {
int old_exc_flags = get_float_exception_flags(fpst);
float64 ret;
ret = float16_to_float64(f, true, fpst);
ret = float64_scalbn(ret, shift, fpst);
old_exc_flags |= get_float_exception_flags(fpst)
& float_flag_input_denormal;
set_float_exception_flags(old_exc_flags, fpst);
return ret;
}
}
uint32_t HELPER(vfp_toshh)(uint32_t x, uint32_t shift, void *fpst) uint32_t HELPER(vfp_toshh)(uint32_t x, uint32_t shift, void *fpst)
{ {
return float64_to_int16(do_prescale_fp16(x, shift, fpst), fpst); if (unlikely(float16_is_any_nan(x))) {
float_raise(float_flag_invalid, fpst);
return 0;
}
return float16_to_int16_scalbn(x, get_float_rounding_mode(fpst),
shift, fpst);
} }
uint32_t HELPER(vfp_touhh)(uint32_t x, uint32_t shift, void *fpst) uint32_t HELPER(vfp_touhh)(uint32_t x, uint32_t shift, void *fpst)
{ {
return float64_to_uint16(do_prescale_fp16(x, shift, fpst), fpst); if (unlikely(float16_is_any_nan(x))) {
float_raise(float_flag_invalid, fpst);
return 0;
}
return float16_to_uint16_scalbn(x, get_float_rounding_mode(fpst),
shift, fpst);
} }
uint32_t HELPER(vfp_toslh)(uint32_t x, uint32_t shift, void *fpst) uint32_t HELPER(vfp_toslh)(uint32_t x, uint32_t shift, void *fpst)
{ {
return float64_to_int32(do_prescale_fp16(x, shift, fpst), fpst); if (unlikely(float16_is_any_nan(x))) {
float_raise(float_flag_invalid, fpst);
return 0;
}
return float16_to_int32_scalbn(x, get_float_rounding_mode(fpst),
shift, fpst);
} }
uint32_t HELPER(vfp_toulh)(uint32_t x, uint32_t shift, void *fpst) uint32_t HELPER(vfp_toulh)(uint32_t x, uint32_t shift, void *fpst)
{ {
return float64_to_uint32(do_prescale_fp16(x, shift, fpst), fpst); if (unlikely(float16_is_any_nan(x))) {
float_raise(float_flag_invalid, fpst);
return 0;
}
return float16_to_uint32_scalbn(x, get_float_rounding_mode(fpst),
shift, fpst);
} }
uint64_t HELPER(vfp_tosqh)(uint32_t x, uint32_t shift, void *fpst) uint64_t HELPER(vfp_tosqh)(uint32_t x, uint32_t shift, void *fpst)
{ {
return float64_to_int64(do_prescale_fp16(x, shift, fpst), fpst); if (unlikely(float16_is_any_nan(x))) {
float_raise(float_flag_invalid, fpst);
return 0;
}
return float16_to_int64_scalbn(x, get_float_rounding_mode(fpst),
shift, fpst);
} }
uint64_t HELPER(vfp_touqh)(uint32_t x, uint32_t shift, void *fpst) uint64_t HELPER(vfp_touqh)(uint32_t x, uint32_t shift, void *fpst)
{ {
return float64_to_uint64(do_prescale_fp16(x, shift, fpst), fpst); if (unlikely(float16_is_any_nan(x))) {
float_raise(float_flag_invalid, fpst);
return 0;
}
return float16_to_uint64_scalbn(x, get_float_rounding_mode(fpst),
shift, fpst);
} }
/* Set the current fp rounding mode and return the old one. /* Set the current fp rounding mode and return the old one.