mirror of
https://github.com/yuzu-emu/unicorn.git
synced 2024-12-23 02:05:36 +00:00
target/arm: Rewrite vector gather stores
This fixes the endianness problem for softmmu, and moves the main loop out of a macro and into an inlined function. Backports commit 78cf1b886aa1b95c97fc5114641515c2892bb240 from qemu
This commit is contained in:
parent
ff63807164
commit
2542ad17d0
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@ -4049,19 +4049,32 @@
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#define helper_sve_stbd_zsu helper_sve_stbd_zsu_aarch64
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#define helper_sve_stbs_zss helper_sve_stbs_zss_aarch64
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#define helper_sve_stbs_zsu helper_sve_stbs_zsu_aarch64
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#define helper_sve_stdd_zd helper_sve_stdd_zd_aarch64
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#define helper_sve_stdd_zss helper_sve_stdd_zss_aarch64
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#define helper_sve_stdd_zsu helper_sve_stdd_zsu_aarch64
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#define helper_sve_sthd_zd helper_sve_sthd_zd_aarch64
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#define helper_sve_sthd_zss helper_sve_sthd_zss_aarch64
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#define helper_sve_sthd_zsu helper_sve_sthd_zsu_aarch64
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#define helper_sve_sths_zss helper_sve_sths_zss_aarch64
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#define helper_sve_sths_zsu helper_sve_sths_zsu_aarch64
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#define helper_sve_stsd_zd helper_sve_stsd_zd_aarch64
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#define helper_sve_stsd_zss helper_sve_stsd_zss_aarch64
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#define helper_sve_stsd_zsu helper_sve_stsd_zsu_aarch64
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#define helper_sve_stss_zss helper_sve_stss_zss_aarch64
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#define helper_sve_stss_zsu helper_sve_stss_zsu_aarch64
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#define helper_sve_stdd_be_zd helper_sve_stdd_be_zd_aarch64
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#define helper_sve_stdd_le_zd helper_sve_stdd_le_zd_aarch64
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#define helper_sve_stdd_be_zss helper_sve_stdd_be_zss_aarch64
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#define helper_sve_stdd_le_zss helper_sve_stdd_le_zss_aarch64
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#define helper_sve_stdd_be_zsu helper_sve_stdd_be_zsu_aarch64
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#define helper_sve_stdd_le_zsu helper_sve_stdd_le_zsu_aarch64
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#define helper_sve_sthd_be_zd helper_sve_sthd_be_zd_aarch64
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#define helper_sve_sthd_le_zd helper_sve_sthd_le_zd_aarch64
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#define helper_sve_sthd_be_zss helper_sve_sthd_be_zss_aarch64
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#define helper_sve_sthd_le_zss helper_sve_sthd_le_zss_aarch64
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#define helper_sve_sthd_be_zsu helper_sve_sthd_be_zsu_aarch64
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#define helper_sve_sthd_le_zsu helper_sve_sthd_le_zsu_aarch64
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#define helper_sve_sths_be_zss helper_sve_sths_be_zss_aarch64
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#define helper_sve_sths_le_zss helper_sve_sths_le_zss_aarch64
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#define helper_sve_sths_be_zsu helper_sve_sths_be_zsu_aarch64
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#define helper_sve_sths_le_zsu helper_sve_sths_le_zsu_aarch64
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#define helper_sve_stsd_be_zd helper_sve_stsd_be_zd_aarch64
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#define helper_sve_stsd_le_zd helper_sve_stsd_le_zd_aarch64
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#define helper_sve_stsd_be_zss helper_sve_stsd_be_zss_aarch64
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#define helper_sve_stsd_le_zss helper_sve_stsd_le_zss_aarch64
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#define helper_sve_stsd_be_zsu helper_sve_stsd_be_zsu_aarch64
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#define helper_sve_stsd_le_zsu helper_sve_stsd_le_zsu_aarch64
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#define helper_sve_stss_be_zss helper_sve_stss_be_zss_aarch64
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#define helper_sve_stss_le_zss helper_sve_stss_le_zss_aarch64
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#define helper_sve_stss_be_zsu helper_sve_stss_be_zsu_aarch64
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#define helper_sve_stss_le_zsu helper_sve_stss_le_zsu_aarch64
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#define helper_sve_sub_zpzz_b helper_sve_sub_zpzz_b_aarch64
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#define helper_sve_sub_zpzz_d helper_sve_sub_zpzz_d_aarch64
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#define helper_sve_sub_zpzz_h helper_sve_sub_zpzz_h_aarch64
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@ -4049,19 +4049,32 @@
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#define helper_sve_stbd_zsu helper_sve_stbd_zsu_aarch64eb
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#define helper_sve_stbs_zss helper_sve_stbs_zss_aarch64eb
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#define helper_sve_stbs_zsu helper_sve_stbs_zsu_aarch64eb
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#define helper_sve_stdd_zd helper_sve_stdd_zd_aarch64eb
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#define helper_sve_stdd_zss helper_sve_stdd_zss_aarch64eb
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#define helper_sve_stdd_zsu helper_sve_stdd_zsu_aarch64eb
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#define helper_sve_sthd_zd helper_sve_sthd_zd_aarch64eb
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#define helper_sve_sthd_zss helper_sve_sthd_zss_aarch64eb
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#define helper_sve_sthd_zsu helper_sve_sthd_zsu_aarch64eb
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#define helper_sve_sths_zss helper_sve_sths_zss_aarch64eb
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#define helper_sve_sths_zsu helper_sve_sths_zsu_aarch64eb
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#define helper_sve_stsd_zd helper_sve_stsd_zd_aarch64eb
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#define helper_sve_stsd_zss helper_sve_stsd_zss_aarch64eb
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#define helper_sve_stsd_zsu helper_sve_stsd_zsu_aarch64eb
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#define helper_sve_stss_zss helper_sve_stss_zss_aarch64eb
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#define helper_sve_stss_zsu helper_sve_stss_zsu_aarch64eb
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#define helper_sve_stdd_be_zd helper_sve_stdd_be_zd_aarch64eb
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#define helper_sve_stdd_le_zd helper_sve_stdd_le_zd_aarch64eb
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#define helper_sve_stdd_be_zss helper_sve_stdd_be_zss_aarch64eb
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#define helper_sve_stdd_le_zss helper_sve_stdd_le_zss_aarch64eb
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#define helper_sve_stdd_be_zsu helper_sve_stdd_be_zsu_aarch64eb
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#define helper_sve_stdd_le_zsu helper_sve_stdd_le_zsu_aarch64eb
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#define helper_sve_sthd_be_zd helper_sve_sthd_be_zd_aarch64eb
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#define helper_sve_sthd_le_zd helper_sve_sthd_le_zd_aarch64eb
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#define helper_sve_sthd_be_zss helper_sve_sthd_be_zss_aarch64eb
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#define helper_sve_sthd_le_zss helper_sve_sthd_le_zss_aarch64eb
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#define helper_sve_sthd_be_zsu helper_sve_sthd_be_zsu_aarch64eb
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#define helper_sve_sthd_le_zsu helper_sve_sthd_le_zsu_aarch64eb
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#define helper_sve_sths_be_zss helper_sve_sths_be_zss_aarch64eb
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#define helper_sve_sths_le_zss helper_sve_sths_le_zss_aarch64eb
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#define helper_sve_sths_be_zsu helper_sve_sths_be_zsu_aarch64eb
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#define helper_sve_sths_le_zsu helper_sve_sths_le_zsu_aarch64eb
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#define helper_sve_stsd_be_zd helper_sve_stsd_be_zd_aarch64eb
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#define helper_sve_stsd_le_zd helper_sve_stsd_le_zd_aarch64eb
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#define helper_sve_stsd_be_zss helper_sve_stsd_be_zss_aarch64eb
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#define helper_sve_stsd_le_zss helper_sve_stsd_le_zss_aarch64eb
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#define helper_sve_stsd_be_zsu helper_sve_stsd_be_zsu_aarch64eb
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#define helper_sve_stsd_le_zsu helper_sve_stsd_le_zsu_aarch64eb
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#define helper_sve_stss_be_zss helper_sve_stss_be_zss_aarch64eb
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#define helper_sve_stss_le_zss helper_sve_stss_le_zss_aarch64eb
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#define helper_sve_stss_be_zsu helper_sve_stss_be_zsu_aarch64eb
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#define helper_sve_stss_le_zsu helper_sve_stss_le_zsu_aarch64eb
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#define helper_sve_sub_zpzz_b helper_sve_sub_zpzz_b_aarch64eb
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#define helper_sve_sub_zpzz_d helper_sve_sub_zpzz_d_aarch64eb
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#define helper_sve_sub_zpzz_h helper_sve_sub_zpzz_h_aarch64eb
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@ -4073,19 +4073,32 @@ aarch64_symbols = (
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'helper_sve_stbd_zsu',
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'helper_sve_stbs_zss',
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'helper_sve_stbs_zsu',
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'helper_sve_stdd_zd',
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'helper_sve_stdd_zss',
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'helper_sve_stdd_zsu',
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'helper_sve_sthd_zd',
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'helper_sve_sthd_zss',
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'helper_sve_sthd_zsu',
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'helper_sve_sths_zss',
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'helper_sve_sths_zsu',
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'helper_sve_stsd_zd',
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'helper_sve_stsd_zss',
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'helper_sve_stsd_zsu',
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'helper_sve_stss_zss',
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'helper_sve_stss_zsu',
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'helper_sve_stdd_be_zd',
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'helper_sve_stdd_le_zd',
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'helper_sve_stdd_be_zss',
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'helper_sve_stdd_le_zss',
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'helper_sve_stdd_be_zsu',
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'helper_sve_stdd_le_zsu',
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'helper_sve_sthd_be_zd',
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'helper_sve_sthd_le_zd',
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'helper_sve_sthd_be_zss',
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'helper_sve_sthd_le_zss',
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'helper_sve_sthd_be_zsu',
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'helper_sve_sthd_le_zsu',
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'helper_sve_sths_be_zss',
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'helper_sve_sths_le_zss',
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'helper_sve_sths_be_zsu',
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'helper_sve_sths_le_zsu',
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'helper_sve_stsd_be_zd',
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'helper_sve_stsd_le_zd',
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'helper_sve_stsd_be_zss',
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'helper_sve_stsd_le_zss',
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'helper_sve_stsd_be_zsu',
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'helper_sve_stsd_le_zsu',
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'helper_sve_stss_be_zss',
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'helper_sve_stss_le_zss',
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'helper_sve_stss_be_zsu',
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'helper_sve_stss_le_zsu',
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'helper_sve_sub_zpzz_b',
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'helper_sve_sub_zpzz_d',
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'helper_sve_sub_zpzz_h',
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@ -1405,41 +1405,67 @@ DEF_HELPER_FLAGS_6(sve_ldffsds_zd, TCG_CALL_NO_WG,
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DEF_HELPER_FLAGS_6(sve_stbs_zsu, TCG_CALL_NO_WG,
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void, env, ptr, ptr, ptr, tl, i32)
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DEF_HELPER_FLAGS_6(sve_sths_zsu, TCG_CALL_NO_WG,
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DEF_HELPER_FLAGS_6(sve_sths_le_zsu, TCG_CALL_NO_WG,
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void, env, ptr, ptr, ptr, tl, i32)
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DEF_HELPER_FLAGS_6(sve_stss_zsu, TCG_CALL_NO_WG,
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DEF_HELPER_FLAGS_6(sve_sths_be_zsu, TCG_CALL_NO_WG,
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void, env, ptr, ptr, ptr, tl, i32)
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DEF_HELPER_FLAGS_6(sve_stss_le_zsu, TCG_CALL_NO_WG,
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void, env, ptr, ptr, ptr, tl, i32)
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DEF_HELPER_FLAGS_6(sve_stss_be_zsu, TCG_CALL_NO_WG,
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void, env, ptr, ptr, ptr, tl, i32)
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DEF_HELPER_FLAGS_6(sve_stbs_zss, TCG_CALL_NO_WG,
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void, env, ptr, ptr, ptr, tl, i32)
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DEF_HELPER_FLAGS_6(sve_sths_zss, TCG_CALL_NO_WG,
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DEF_HELPER_FLAGS_6(sve_sths_le_zss, TCG_CALL_NO_WG,
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void, env, ptr, ptr, ptr, tl, i32)
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DEF_HELPER_FLAGS_6(sve_stss_zss, TCG_CALL_NO_WG,
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DEF_HELPER_FLAGS_6(sve_sths_be_zss, TCG_CALL_NO_WG,
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void, env, ptr, ptr, ptr, tl, i32)
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DEF_HELPER_FLAGS_6(sve_stss_le_zss, TCG_CALL_NO_WG,
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void, env, ptr, ptr, ptr, tl, i32)
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DEF_HELPER_FLAGS_6(sve_stss_be_zss, TCG_CALL_NO_WG,
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void, env, ptr, ptr, ptr, tl, i32)
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DEF_HELPER_FLAGS_6(sve_stbd_zsu, TCG_CALL_NO_WG,
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void, env, ptr, ptr, ptr, tl, i32)
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DEF_HELPER_FLAGS_6(sve_sthd_zsu, TCG_CALL_NO_WG,
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DEF_HELPER_FLAGS_6(sve_sthd_le_zsu, TCG_CALL_NO_WG,
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void, env, ptr, ptr, ptr, tl, i32)
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DEF_HELPER_FLAGS_6(sve_stsd_zsu, TCG_CALL_NO_WG,
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DEF_HELPER_FLAGS_6(sve_sthd_be_zsu, TCG_CALL_NO_WG,
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void, env, ptr, ptr, ptr, tl, i32)
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DEF_HELPER_FLAGS_6(sve_stdd_zsu, TCG_CALL_NO_WG,
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DEF_HELPER_FLAGS_6(sve_stsd_le_zsu, TCG_CALL_NO_WG,
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void, env, ptr, ptr, ptr, tl, i32)
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DEF_HELPER_FLAGS_6(sve_stsd_be_zsu, TCG_CALL_NO_WG,
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void, env, ptr, ptr, ptr, tl, i32)
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DEF_HELPER_FLAGS_6(sve_stdd_le_zsu, TCG_CALL_NO_WG,
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void, env, ptr, ptr, ptr, tl, i32)
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DEF_HELPER_FLAGS_6(sve_stdd_be_zsu, TCG_CALL_NO_WG,
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void, env, ptr, ptr, ptr, tl, i32)
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DEF_HELPER_FLAGS_6(sve_stbd_zss, TCG_CALL_NO_WG,
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void, env, ptr, ptr, ptr, tl, i32)
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DEF_HELPER_FLAGS_6(sve_sthd_zss, TCG_CALL_NO_WG,
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DEF_HELPER_FLAGS_6(sve_sthd_le_zss, TCG_CALL_NO_WG,
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void, env, ptr, ptr, ptr, tl, i32)
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DEF_HELPER_FLAGS_6(sve_stsd_zss, TCG_CALL_NO_WG,
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DEF_HELPER_FLAGS_6(sve_sthd_be_zss, TCG_CALL_NO_WG,
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void, env, ptr, ptr, ptr, tl, i32)
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DEF_HELPER_FLAGS_6(sve_stdd_zss, TCG_CALL_NO_WG,
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DEF_HELPER_FLAGS_6(sve_stsd_le_zss, TCG_CALL_NO_WG,
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void, env, ptr, ptr, ptr, tl, i32)
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DEF_HELPER_FLAGS_6(sve_stsd_be_zss, TCG_CALL_NO_WG,
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void, env, ptr, ptr, ptr, tl, i32)
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DEF_HELPER_FLAGS_6(sve_stdd_le_zss, TCG_CALL_NO_WG,
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void, env, ptr, ptr, ptr, tl, i32)
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DEF_HELPER_FLAGS_6(sve_stdd_be_zss, TCG_CALL_NO_WG,
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void, env, ptr, ptr, ptr, tl, i32)
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DEF_HELPER_FLAGS_6(sve_stbd_zd, TCG_CALL_NO_WG,
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void, env, ptr, ptr, ptr, tl, i32)
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DEF_HELPER_FLAGS_6(sve_sthd_zd, TCG_CALL_NO_WG,
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DEF_HELPER_FLAGS_6(sve_sthd_le_zd, TCG_CALL_NO_WG,
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void, env, ptr, ptr, ptr, tl, i32)
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DEF_HELPER_FLAGS_6(sve_stsd_zd, TCG_CALL_NO_WG,
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DEF_HELPER_FLAGS_6(sve_sthd_be_zd, TCG_CALL_NO_WG,
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void, env, ptr, ptr, ptr, tl, i32)
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DEF_HELPER_FLAGS_6(sve_stdd_zd, TCG_CALL_NO_WG,
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DEF_HELPER_FLAGS_6(sve_stsd_le_zd, TCG_CALL_NO_WG,
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void, env, ptr, ptr, ptr, tl, i32)
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DEF_HELPER_FLAGS_6(sve_stsd_be_zd, TCG_CALL_NO_WG,
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void, env, ptr, ptr, ptr, tl, i32)
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DEF_HELPER_FLAGS_6(sve_stdd_le_zd, TCG_CALL_NO_WG,
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void, env, ptr, ptr, ptr, tl, i32)
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DEF_HELPER_FLAGS_6(sve_stdd_be_zd, TCG_CALL_NO_WG,
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void, env, ptr, ptr, ptr, tl, i32)
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@ -5121,61 +5121,100 @@ DO_LDFF1_ZPZ_D(sve_ldffsds_zd, uint64_t, int32_t, cpu_ldl_data_ra)
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/* Stores with a vector index. */
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#define DO_ST1_ZPZ_S(NAME, TYPEI, FN) \
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void HELPER(NAME)(CPUARMState *env, void *vd, void *vg, void *vm, \
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target_ulong base, uint32_t desc) \
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{ \
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intptr_t i, oprsz = simd_oprsz(desc); \
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unsigned scale = simd_data(desc); \
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uintptr_t ra = GETPC(); \
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for (i = 0; i < oprsz; ) { \
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uint16_t pg = *(uint16_t *)(vg + H1_2(i >> 3)); \
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do { \
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if (likely(pg & 1)) { \
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target_ulong off = *(TYPEI *)(vm + H1_4(i)); \
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uint32_t d = *(uint32_t *)(vd + H1_4(i)); \
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FN(env, base + (off << scale), d, ra); \
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} \
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i += sizeof(uint32_t), pg >>= sizeof(uint32_t); \
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} while (i & 15); \
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} \
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static void sve_st1_zs(CPUARMState *env, void *vd, void *vg, void *vm,
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target_ulong base, uint32_t desc, uintptr_t ra,
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zreg_off_fn *off_fn, sve_ld1_tlb_fn *tlb_fn)
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{
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const int mmu_idx = cpu_mmu_index(env, false);
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intptr_t i, oprsz = simd_oprsz(desc);
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unsigned scale = simd_data(desc);
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set_helper_retaddr(ra);
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for (i = 0; i < oprsz; ) {
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uint16_t pg = *(uint16_t *)(vg + H1_2(i >> 3));
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do {
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if (likely(pg & 1)) {
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target_ulong off = off_fn(vm, i);
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tlb_fn(env, vd, i, base + (off << scale), mmu_idx, ra);
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}
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i += 4, pg >>= 4;
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} while (i & 15);
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}
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set_helper_retaddr(0);
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}
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#define DO_ST1_ZPZ_D(NAME, TYPEI, FN) \
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void HELPER(NAME)(CPUARMState *env, void *vd, void *vg, void *vm, \
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target_ulong base, uint32_t desc) \
|
||||
{ \
|
||||
intptr_t i, oprsz = simd_oprsz(desc) / 8; \
|
||||
unsigned scale = simd_data(desc); \
|
||||
uintptr_t ra = GETPC(); \
|
||||
uint64_t *d = vd, *m = vm; uint8_t *pg = vg; \
|
||||
for (i = 0; i < oprsz; i++) { \
|
||||
if (likely(pg[H1(i)] & 1)) { \
|
||||
target_ulong off = (target_ulong)(TYPEI)m[i] << scale; \
|
||||
FN(env, base + off, d[i], ra); \
|
||||
} \
|
||||
} \
|
||||
static void sve_st1_zd(CPUARMState *env, void *vd, void *vg, void *vm,
|
||||
target_ulong base, uint32_t desc, uintptr_t ra,
|
||||
zreg_off_fn *off_fn, sve_ld1_tlb_fn *tlb_fn)
|
||||
{
|
||||
const int mmu_idx = cpu_mmu_index(env, false);
|
||||
intptr_t i, oprsz = simd_oprsz(desc) / 8;
|
||||
unsigned scale = simd_data(desc);
|
||||
|
||||
set_helper_retaddr(ra);
|
||||
for (i = 0; i < oprsz; i++) {
|
||||
uint8_t pg = *(uint8_t *)(vg + H1(i));
|
||||
if (likely(pg & 1)) {
|
||||
target_ulong off = off_fn(vm, i * 8);
|
||||
tlb_fn(env, vd, i * 8, base + (off << scale), mmu_idx, ra);
|
||||
}
|
||||
}
|
||||
set_helper_retaddr(0);
|
||||
}
|
||||
|
||||
DO_ST1_ZPZ_S(sve_stbs_zsu, uint32_t, cpu_stb_data_ra)
|
||||
DO_ST1_ZPZ_S(sve_sths_zsu, uint32_t, cpu_stw_data_ra)
|
||||
DO_ST1_ZPZ_S(sve_stss_zsu, uint32_t, cpu_stl_data_ra)
|
||||
#define DO_ST1_ZPZ_S(MEM, OFS) \
|
||||
void __attribute__((flatten)) HELPER(sve_st##MEM##_##OFS) \
|
||||
(CPUARMState *env, void *vd, void *vg, void *vm, \
|
||||
target_ulong base, uint32_t desc) \
|
||||
{ \
|
||||
sve_st1_zs(env, vd, vg, vm, base, desc, GETPC(), \
|
||||
off_##OFS##_s, sve_st1##MEM##_tlb); \
|
||||
}
|
||||
|
||||
DO_ST1_ZPZ_S(sve_stbs_zss, int32_t, cpu_stb_data_ra)
|
||||
DO_ST1_ZPZ_S(sve_sths_zss, int32_t, cpu_stw_data_ra)
|
||||
DO_ST1_ZPZ_S(sve_stss_zss, int32_t, cpu_stl_data_ra)
|
||||
#define DO_ST1_ZPZ_D(MEM, OFS) \
|
||||
void __attribute__((flatten)) HELPER(sve_st##MEM##_##OFS) \
|
||||
(CPUARMState *env, void *vd, void *vg, void *vm, \
|
||||
target_ulong base, uint32_t desc) \
|
||||
{ \
|
||||
sve_st1_zd(env, vd, vg, vm, base, desc, GETPC(), \
|
||||
off_##OFS##_d, sve_st1##MEM##_tlb); \
|
||||
}
|
||||
|
||||
DO_ST1_ZPZ_D(sve_stbd_zsu, uint32_t, cpu_stb_data_ra)
|
||||
DO_ST1_ZPZ_D(sve_sthd_zsu, uint32_t, cpu_stw_data_ra)
|
||||
DO_ST1_ZPZ_D(sve_stsd_zsu, uint32_t, cpu_stl_data_ra)
|
||||
DO_ST1_ZPZ_D(sve_stdd_zsu, uint32_t, cpu_stq_data_ra)
|
||||
DO_ST1_ZPZ_S(bs, zsu)
|
||||
DO_ST1_ZPZ_S(hs_le, zsu)
|
||||
DO_ST1_ZPZ_S(hs_be, zsu)
|
||||
DO_ST1_ZPZ_S(ss_le, zsu)
|
||||
DO_ST1_ZPZ_S(ss_be, zsu)
|
||||
|
||||
DO_ST1_ZPZ_D(sve_stbd_zss, int32_t, cpu_stb_data_ra)
|
||||
DO_ST1_ZPZ_D(sve_sthd_zss, int32_t, cpu_stw_data_ra)
|
||||
DO_ST1_ZPZ_D(sve_stsd_zss, int32_t, cpu_stl_data_ra)
|
||||
DO_ST1_ZPZ_D(sve_stdd_zss, int32_t, cpu_stq_data_ra)
|
||||
DO_ST1_ZPZ_S(bs, zss)
|
||||
DO_ST1_ZPZ_S(hs_le, zss)
|
||||
DO_ST1_ZPZ_S(hs_be, zss)
|
||||
DO_ST1_ZPZ_S(ss_le, zss)
|
||||
DO_ST1_ZPZ_S(ss_be, zss)
|
||||
|
||||
DO_ST1_ZPZ_D(sve_stbd_zd, uint64_t, cpu_stb_data_ra)
|
||||
DO_ST1_ZPZ_D(sve_sthd_zd, uint64_t, cpu_stw_data_ra)
|
||||
DO_ST1_ZPZ_D(sve_stsd_zd, uint64_t, cpu_stl_data_ra)
|
||||
DO_ST1_ZPZ_D(sve_stdd_zd, uint64_t, cpu_stq_data_ra)
|
||||
DO_ST1_ZPZ_D(bd, zsu)
|
||||
DO_ST1_ZPZ_D(hd_le, zsu)
|
||||
DO_ST1_ZPZ_D(hd_be, zsu)
|
||||
DO_ST1_ZPZ_D(sd_le, zsu)
|
||||
DO_ST1_ZPZ_D(sd_be, zsu)
|
||||
DO_ST1_ZPZ_D(dd_le, zsu)
|
||||
DO_ST1_ZPZ_D(dd_be, zsu)
|
||||
|
||||
DO_ST1_ZPZ_D(bd, zss)
|
||||
DO_ST1_ZPZ_D(hd_le, zss)
|
||||
DO_ST1_ZPZ_D(hd_be, zss)
|
||||
DO_ST1_ZPZ_D(sd_le, zss)
|
||||
DO_ST1_ZPZ_D(sd_be, zss)
|
||||
DO_ST1_ZPZ_D(dd_le, zss)
|
||||
DO_ST1_ZPZ_D(dd_be, zss)
|
||||
|
||||
DO_ST1_ZPZ_D(bd, zd)
|
||||
DO_ST1_ZPZ_D(hd_le, zd)
|
||||
DO_ST1_ZPZ_D(hd_be, zd)
|
||||
DO_ST1_ZPZ_D(sd_le, zd)
|
||||
DO_ST1_ZPZ_D(sd_be, zd)
|
||||
DO_ST1_ZPZ_D(dd_le, zd)
|
||||
DO_ST1_ZPZ_D(dd_be, zd)
|
||||
|
||||
#undef DO_ST1_ZPZ_S
|
||||
#undef DO_ST1_ZPZ_D
|
||||
|
|
|
@ -5369,34 +5369,58 @@ static bool trans_LD1_zpiz(DisasContext *s, arg_LD1_zpiz *a, uint32_t insn)
|
|||
}
|
||||
|
||||
/* Indexed by [xs][msz]. */
|
||||
static gen_helper_gvec_mem_scatter * const scatter_store_fn32[2][3] = {
|
||||
{ gen_helper_sve_stbs_zsu,
|
||||
gen_helper_sve_sths_zsu,
|
||||
gen_helper_sve_stss_zsu, },
|
||||
{ gen_helper_sve_stbs_zss,
|
||||
gen_helper_sve_sths_zss,
|
||||
gen_helper_sve_stss_zss, },
|
||||
/* Indexed by [be][xs][msz]. */
|
||||
static gen_helper_gvec_mem_scatter * const scatter_store_fn32[2][2][3] = {
|
||||
/* Little-endian */
|
||||
{ { gen_helper_sve_stbs_zsu,
|
||||
gen_helper_sve_sths_le_zsu,
|
||||
gen_helper_sve_stss_le_zsu, },
|
||||
{ gen_helper_sve_stbs_zss,
|
||||
gen_helper_sve_sths_le_zss,
|
||||
gen_helper_sve_stss_le_zss, } },
|
||||
/* Big-endian */
|
||||
{ { gen_helper_sve_stbs_zsu,
|
||||
gen_helper_sve_sths_be_zsu,
|
||||
gen_helper_sve_stss_be_zsu, },
|
||||
{ gen_helper_sve_stbs_zss,
|
||||
gen_helper_sve_sths_be_zss,
|
||||
gen_helper_sve_stss_be_zss, } },
|
||||
};
|
||||
|
||||
/* Note that we overload xs=2 to indicate 64-bit offset. */
|
||||
static gen_helper_gvec_mem_scatter * const scatter_store_fn64[3][4] = {
|
||||
{ gen_helper_sve_stbd_zsu,
|
||||
gen_helper_sve_sthd_zsu,
|
||||
gen_helper_sve_stsd_zsu,
|
||||
gen_helper_sve_stdd_zsu, },
|
||||
{ gen_helper_sve_stbd_zss,
|
||||
gen_helper_sve_sthd_zss,
|
||||
gen_helper_sve_stsd_zss,
|
||||
gen_helper_sve_stdd_zss, },
|
||||
{ gen_helper_sve_stbd_zd,
|
||||
gen_helper_sve_sthd_zd,
|
||||
gen_helper_sve_stsd_zd,
|
||||
gen_helper_sve_stdd_zd, },
|
||||
static gen_helper_gvec_mem_scatter * const scatter_store_fn64[2][3][4] = {
|
||||
/* Little-endian */
|
||||
{ { gen_helper_sve_stbd_zsu,
|
||||
gen_helper_sve_sthd_le_zsu,
|
||||
gen_helper_sve_stsd_le_zsu,
|
||||
gen_helper_sve_stdd_le_zsu, },
|
||||
{ gen_helper_sve_stbd_zss,
|
||||
gen_helper_sve_sthd_le_zss,
|
||||
gen_helper_sve_stsd_le_zss,
|
||||
gen_helper_sve_stdd_le_zss, },
|
||||
{ gen_helper_sve_stbd_zd,
|
||||
gen_helper_sve_sthd_le_zd,
|
||||
gen_helper_sve_stsd_le_zd,
|
||||
gen_helper_sve_stdd_le_zd, } },
|
||||
/* Big-endian */
|
||||
{ { gen_helper_sve_stbd_zsu,
|
||||
gen_helper_sve_sthd_be_zsu,
|
||||
gen_helper_sve_stsd_be_zsu,
|
||||
gen_helper_sve_stdd_be_zsu, },
|
||||
{ gen_helper_sve_stbd_zss,
|
||||
gen_helper_sve_sthd_be_zss,
|
||||
gen_helper_sve_stsd_be_zss,
|
||||
gen_helper_sve_stdd_be_zss, },
|
||||
{ gen_helper_sve_stbd_zd,
|
||||
gen_helper_sve_sthd_be_zd,
|
||||
gen_helper_sve_stsd_be_zd,
|
||||
gen_helper_sve_stdd_be_zd, } },
|
||||
};
|
||||
|
||||
static bool trans_ST1_zprz(DisasContext *s, arg_ST1_zprz *a, uint32_t insn)
|
||||
{
|
||||
gen_helper_gvec_mem_scatter *fn;
|
||||
int be = s->be_data == MO_BE;
|
||||
|
||||
if (a->esz < a->msz || (a->msz == 0 && a->scale)) {
|
||||
return false;
|
||||
|
@ -5406,10 +5430,10 @@ static bool trans_ST1_zprz(DisasContext *s, arg_ST1_zprz *a, uint32_t insn)
|
|||
}
|
||||
switch (a->esz) {
|
||||
case MO_32:
|
||||
fn = scatter_store_fn32[a->xs][a->msz];
|
||||
fn = scatter_store_fn32[be][a->xs][a->msz];
|
||||
break;
|
||||
case MO_64:
|
||||
fn = scatter_store_fn64[a->xs][a->msz];
|
||||
fn = scatter_store_fn64[be][a->xs][a->msz];
|
||||
break;
|
||||
default:
|
||||
g_assert_not_reached();
|
||||
|
@ -5422,6 +5446,7 @@ static bool trans_ST1_zprz(DisasContext *s, arg_ST1_zprz *a, uint32_t insn)
|
|||
static bool trans_ST1_zpiz(DisasContext *s, arg_ST1_zpiz *a, uint32_t insn)
|
||||
{
|
||||
gen_helper_gvec_mem_scatter *fn = NULL;
|
||||
int be = s->be_data == MO_BE;
|
||||
TCGv_i64 imm;
|
||||
|
||||
if (a->esz < a->msz) {
|
||||
|
@ -5435,10 +5460,10 @@ static bool trans_ST1_zpiz(DisasContext *s, arg_ST1_zpiz *a, uint32_t insn)
|
|||
|
||||
switch (a->esz) {
|
||||
case MO_32:
|
||||
fn = scatter_store_fn32[0][a->msz];
|
||||
fn = scatter_store_fn32[be][0][a->msz];
|
||||
break;
|
||||
case MO_64:
|
||||
fn = scatter_store_fn64[2][a->msz];
|
||||
fn = scatter_store_fn64[be][2][a->msz];
|
||||
break;
|
||||
}
|
||||
assert(fn != NULL);
|
||||
|
|
Loading…
Reference in a new issue