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x86/cpu: Enable new SSE/AVX/AVX512 cpu features
Intel IceLake cpu has added new cpu features,AVX512_VBMI2/GFNI/ VAES/VPCLMULQDQ/AVX512_VNNI/AVX512_BITALG. Those new cpu features need expose to guest VM. The bit definition: CPUID.(EAX=7,ECX=0):ECX[bit 06] AVX512_VBMI2 CPUID.(EAX=7,ECX=0):ECX[bit 08] GFNI CPUID.(EAX=7,ECX=0):ECX[bit 09] VAES CPUID.(EAX=7,ECX=0):ECX[bit 10] VPCLMULQDQ CPUID.(EAX=7,ECX=0):ECX[bit 11] AVX512_VNNI CPUID.(EAX=7,ECX=0):ECX[bit 12] AVX512_BITALG The release document ref below link: https://software.intel.com/sites/default/files/managed/c5/15/\ architecture-instruction-set-extensions-programming-reference.pdf Backports commit aff9e6e46a343e1404498be4edd03db1112f0950 from qemu
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parent
3e5d4f4ee8
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258b885b17
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@ -312,9 +312,9 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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{
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{
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NULL, "avx512vbmi", "umip", "pku",
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"ospke", NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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NULL, NULL, "avx512-vpopcntdq", NULL,
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"ospke", NULL, "avx512vbmi2", NULL,
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"gfni", "vaes", "vpclmulqdq", "avx512vnni",
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"avx512bitalg", NULL, "avx512-vpopcntdq", NULL,
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"la57", NULL, NULL, NULL,
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NULL, NULL, "rdpid", NULL,
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NULL, NULL, NULL, NULL,
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@ -635,6 +635,12 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS];
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#define CPUID_7_0_ECX_UMIP (1U << 2)
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#define CPUID_7_0_ECX_PKU (1U << 3)
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#define CPUID_7_0_ECX_OSPKE (1U << 4)
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#define CPUID_7_0_ECX_VBMI2 (1U << 6) /* Additional VBMI Instrs */
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#define CPUID_7_0_ECX_GFNI (1U << 8)
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#define CPUID_7_0_ECX_VAES (1U << 9)
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#define CPUID_7_0_ECX_VPCLMULQDQ (1U << 10)
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#define CPUID_7_0_ECX_AVX512VNNI (1U << 11)
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#define CPUID_7_0_ECX_AVX512BITALG (1U << 12)
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#define CPUID_7_0_ECX_AVX512_VPOPCNTDQ (1U << 14) /* POPCNT for vectors of DW/QW */
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#define CPUID_7_0_ECX_LA57 (1U << 16)
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#define CPUID_7_0_ECX_RDPID (1U << 22)
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