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target/arm: Mark PMINTENSET accesses as possibly doing IO

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This makes it match its AArch64 equivalent, PMINTENSET_EL1

Backports commit b7d793ad3db06401bc817c0ca355a2d160c802d4 from qemu
This commit is contained in:
Aaron Lindsay 2018-07-03 05:04:57 -04:00 committed by Lioncash
parent 4684e875d3
commit 27afa92f24
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 1 additions and 1 deletions
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qemu/target/arm/helper.c
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@ -1232,7 +1232,7 @@ static const ARMCPRegInfo v7_cp_reginfo[] = {
{ "PMUSERENR_EL0", 0,9,14,3,3,0, ARM_CP_STATE_AA64, ARM_CP_ALIAS,
PL0_R | PL1_RW, 0, NULL, 0, offsetof(CPUARMState, cp15.c9_pmuserenr), {0, 0},
access_tpm, NULL, pmuserenr_write, NULL, raw_write },
{ "PMINTENSET", 15,9,14, 0,0,1, 0, ARM_CP_ALIAS,
{ "PMINTENSET", 15,9,14, 0,0,1, 0, ARM_CP_ALIAS | ARM_CP_IO,
PL1_RW, 0, NULL, 0, offsetoflow32(CPUARMState, cp15.c9_pminten), {0, 0},
access_tpm, NULL, pmintenset_write, NULL, raw_write },
{ "PMINTENSET_EL1", 0,9,14, 3,0,1, ARM_CP_STATE_AA64, ARM_CP_IO,