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target/arm/helper: pass explicit fpst to set_rmode

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As the rounding mode is now split between FP16 and the rest of
floating point we need to be explicit when tweaking it. Instead of
passing the CPU env we now pass the appropriate fpst pointer directly.

Backports commit 9b04991686785e18b18a36d193b68f08f7c91648 from qemu
This commit is contained in:
Alex Bennée 2018-03-08 12:38:24 -05:00 committed by Lioncash
parent 996f38056f
commit 27d8d01566
No known key found for this signature in database
GPG key ID: 4E3C3CC1031BA9C7
4 changed files with 22 additions and 22 deletions
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4
qemu/target/arm/helper.c
View file

@ -10585,9 +10585,9 @@ VFP_CONV_FIX_A64(uq, s, 32, 64, uint64)
/* Set the current fp rounding mode and return the old one.
* The argument is a softfloat float_round_ value.
*/
uint32_t HELPER(set_rmode)(uint32_t rmode, CPUARMState *env)
uint32_t HELPER(set_rmode)(uint32_t rmode, void *fpstp)
{
float_status *fp_status = &env->vfp.fp_status;
float_status *fp_status = fpstp;
uint32_t prev_rmode = get_float_rounding_mode(fp_status);
set_float_rounding_mode(rmode, fp_status);

2
qemu/target/arm/helper.h
View file

@ -169,7 +169,7 @@ DEF_HELPER_3(vfp_uhtod, f64, i64, i32, ptr)
DEF_HELPER_3(vfp_ultod, f64, i64, i32, ptr)
DEF_HELPER_3(vfp_uqtod, f64, i64, i32, ptr)
DEF_HELPER_FLAGS_2(set_rmode, TCG_CALL_NO_RWG, i32, i32, env)
DEF_HELPER_FLAGS_2(set_rmode, TCG_CALL_NO_RWG, i32, i32, ptr)
DEF_HELPER_FLAGS_2(set_neon_rmode, TCG_CALL_NO_RWG, i32, i32, env)
DEF_HELPER_2(vfp_fcvt_f16_to_f32, f32, i32, env)

26
qemu/target/arm/translate-a64.c
View file

@ -4723,10 +4723,10 @@ static void handle_fp_1src_single(DisasContext *s, int opcode, int rd, int rn)
{
TCGv_i32 tcg_rmode = tcg_const_i32(tcg_ctx, arm_rmode_to_sf(opcode & 7));
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, tcg_ctx->cpu_env);
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, fpst);
gen_helper_rints(tcg_ctx, tcg_res, tcg_op, fpst);
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, tcg_ctx->cpu_env);
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, fpst);
tcg_temp_free_i32(tcg_ctx, tcg_rmode);
break;
}
@ -4783,10 +4783,10 @@ static void handle_fp_1src_double(DisasContext *s, int opcode, int rd, int rn)
{
TCGv_i32 tcg_rmode = tcg_const_i32(tcg_ctx, arm_rmode_to_sf(opcode & 7));
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, tcg_ctx->cpu_env);
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, fpst);
gen_helper_rintd(tcg_ctx, tcg_res, tcg_op, fpst);
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, tcg_ctx->cpu_env);
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, fpst);
tcg_temp_free_i32(tcg_ctx, tcg_rmode);
break;
}
@ -5320,7 +5320,7 @@ static void handle_fpfpcvt(DisasContext *s, int rd, int rn, int opcode,
tcg_rmode = tcg_const_i32(tcg_ctx, arm_rmode_to_sf(rmode));
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, tcg_ctx->cpu_env);
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, tcg_fpstatus);
if (is_double) {
TCGv_i64 tcg_double = read_fp_dreg(s, rn);
@ -5367,7 +5367,7 @@ static void handle_fpfpcvt(DisasContext *s, int rd, int rn, int opcode,
tcg_temp_free_i32(tcg_ctx, tcg_single);
}
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, tcg_ctx->cpu_env);
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, tcg_fpstatus);
tcg_temp_free_i32(tcg_ctx, tcg_rmode);
if (!sf) {
@ -7109,8 +7109,8 @@ static void handle_simd_shift_fpint_conv(DisasContext *s, bool is_scalar,
assert(!(is_scalar && is_q));
tcg_rmode = tcg_const_i32(tcg_ctx, arm_rmode_to_sf(FPROUNDING_ZERO));
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, tcg_ctx->cpu_env);
tcg_fpstatus = get_fpstatus_ptr(tcg_ctx, false);
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, tcg_fpstatus);
tcg_shift = tcg_const_i32(tcg_ctx, fracbits);
if (is_double) {
@ -7154,7 +7154,7 @@ static void handle_simd_shift_fpint_conv(DisasContext *s, bool is_scalar,
tcg_temp_free_ptr(tcg_ctx, tcg_fpstatus);
tcg_temp_free_i32(tcg_ctx, tcg_shift);
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, tcg_ctx->cpu_env);
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, tcg_fpstatus);
tcg_temp_free_i32(tcg_ctx, tcg_rmode);
}
@ -8438,8 +8438,8 @@ static void disas_simd_scalar_two_reg_misc(DisasContext *s, uint32_t insn)
if (is_fcvt) {
tcg_rmode = tcg_const_i32(tcg_ctx, arm_rmode_to_sf(rmode));
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, tcg_ctx->cpu_env);
tcg_fpstatus = get_fpstatus_ptr(tcg_ctx, false);
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, tcg_fpstatus);
} else {
tcg_rmode = NULL;
tcg_fpstatus = NULL;
@ -8504,7 +8504,7 @@ static void disas_simd_scalar_two_reg_misc(DisasContext *s, uint32_t insn)
}
if (is_fcvt) {
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, tcg_ctx->cpu_env);
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, tcg_fpstatus);
tcg_temp_free_i32(tcg_ctx, tcg_rmode);
tcg_temp_free_ptr(tcg_ctx, tcg_fpstatus);
}
@ -10835,14 +10835,14 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn)
return;
}
if (need_fpstatus) {
if (need_fpstatus || need_rmode) {
tcg_fpstatus = get_fpstatus_ptr(tcg_ctx, false);
} else {
tcg_fpstatus = NULL;
}
if (need_rmode) {
tcg_rmode = tcg_const_i32(tcg_ctx, arm_rmode_to_sf(rmode));
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, tcg_ctx->cpu_env);
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, tcg_fpstatus);
} else {
tcg_rmode = NULL;
}
@ -11084,7 +11084,7 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn)
clear_vec_high(s, is_q, rd);
if (need_rmode) {
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, tcg_ctx->cpu_env);
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, tcg_fpstatus);
tcg_temp_free_i32(tcg_ctx, tcg_rmode);
}
if (need_fpstatus) {

12
qemu/target/arm/translate.c
View file

@ -3250,7 +3250,7 @@ static int handle_vrint(DisasContext *s, uint32_t insn, uint32_t rd, uint32_t rm
TCGv_i32 tcg_rmode;
tcg_rmode = tcg_const_i32(tcg_ctx, arm_rmode_to_sf(rounding));
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, tcg_ctx->cpu_env);
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, fpst);
if (dp) {
TCGv_i64 tcg_op;
@ -3274,7 +3274,7 @@ static int handle_vrint(DisasContext *s, uint32_t insn, uint32_t rd, uint32_t rm
tcg_temp_free_i32(tcg_ctx, tcg_res);
}
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, tcg_ctx->cpu_env);
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, fpst);
tcg_temp_free_i32(tcg_ctx, tcg_rmode);
tcg_temp_free_ptr(tcg_ctx, fpst);
@ -3292,7 +3292,7 @@ static int handle_vcvt(DisasContext *s, uint32_t insn, uint32_t rd, uint32_t rm,
tcg_shift = tcg_const_i32(tcg_ctx, 0);
tcg_rmode = tcg_const_i32(tcg_ctx, arm_rmode_to_sf(rounding));
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, tcg_ctx->cpu_env);
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, fpst);
if (dp) {
TCGv_i64 tcg_double, tcg_res;
@ -3330,7 +3330,7 @@ static int handle_vcvt(DisasContext *s, uint32_t insn, uint32_t rd, uint32_t rm,
tcg_temp_free_i32(tcg_ctx, tcg_single);
}
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, tcg_ctx->cpu_env);
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, fpst);
tcg_temp_free_i32(tcg_ctx, tcg_rmode);
tcg_temp_free_i32(tcg_ctx, tcg_shift);
@ -4001,13 +4001,13 @@ static int disas_vfp_insn(DisasContext *s, uint32_t insn)
TCGv_ptr fpst = get_fpstatus_ptr(s, 0);
TCGv_i32 tcg_rmode;
tcg_rmode = tcg_const_i32(tcg_ctx, float_round_to_zero);
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, tcg_ctx->cpu_env);
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, fpst);
if (dp) {
gen_helper_rintd(tcg_ctx, tcg_ctx->cpu_F0d, tcg_ctx->cpu_F0d, fpst);
} else {
gen_helper_rints(tcg_ctx, tcg_ctx->cpu_F0s, tcg_ctx->cpu_F0s, fpst);
}
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, tcg_ctx->cpu_env);
gen_helper_set_rmode(tcg_ctx, tcg_rmode, tcg_rmode, fpst);
tcg_temp_free_i32(tcg_ctx, tcg_rmode);
tcg_temp_free_ptr(tcg_ctx, fpst);
break;