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tcg: Introduce tcgv_{i32,i64,ptr}_{arg,temp}

Browse source 
Transform TCGv_* to an "argument" or a temporary.
For now, an argument is simply the temporary index.

Backports commit ae8b75dc6ec808378487064922f25f1e7ea7a9be from qemu
This commit is contained in:
Richard Henderson 2018-03-05 08:27:45 -05:00 committed by Lioncash
parent 9f8c6a456b
commit 2bb5011b18
No known key found for this signature in database
GPG key ID: 4E3C3CC1031BA9C7
6 changed files with 124 additions and 96 deletions
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10
qemu/include/exec/helper-gen.h
View file

@ -16,7 +16,7 @@ static inline void glue(gen_helper_, name)(TCGContext *tcg_ctx, dh_retvar_decl0(
static inline void glue(gen_helper_, name)(TCGContext *tcg_ctx, dh_retvar_decl(ret) \
dh_arg_decl(t1, 1)) \
{ \
TCGArg args[1] = { dh_arg(t1, 1) }; \
TCGTemp *args[1] = { dh_arg(t1, 1) }; \
tcg_gen_callN(tcg_ctx, HELPER(name), dh_retvar(ret), 1, args); \
}
@ -24,7 +24,7 @@ static inline void glue(gen_helper_, name)(TCGContext *tcg_ctx, dh_retvar_decl(r
static inline void glue(gen_helper_, name)(TCGContext *tcg_ctx, dh_retvar_decl(ret) \
dh_arg_decl(t1, 1), dh_arg_decl(t2, 2)) \
{ \
TCGArg args[2] = { dh_arg(t1, 1), dh_arg(t2, 2) }; \
TCGTemp *args[2] = { dh_arg(t1, 1), dh_arg(t2, 2) }; \
tcg_gen_callN(tcg_ctx, HELPER(name), dh_retvar(ret), 2, args); \
}
@ -32,7 +32,7 @@ static inline void glue(gen_helper_, name)(TCGContext *tcg_ctx, dh_retvar_decl(r
static inline void glue(gen_helper_, name)(TCGContext *tcg_ctx, dh_retvar_decl(ret) \
dh_arg_decl(t1, 1), dh_arg_decl(t2, 2), dh_arg_decl(t3, 3)) \
{ \
TCGArg args[3] = { dh_arg(t1, 1), dh_arg(t2, 2), dh_arg(t3, 3) }; \
TCGTemp *args[3] = { dh_arg(t1, 1), dh_arg(t2, 2), dh_arg(t3, 3) }; \
tcg_gen_callN(tcg_ctx, HELPER(name), dh_retvar(ret), 3, args); \
}
@ -41,7 +41,7 @@ static inline void glue(gen_helper_, name)(TCGContext *tcg_ctx, dh_retvar_decl(r
dh_arg_decl(t1, 1), dh_arg_decl(t2, 2), \
dh_arg_decl(t3, 3), dh_arg_decl(t4, 4)) \
{ \
TCGArg args[4] = { dh_arg(t1, 1), dh_arg(t2, 2), \
TCGTemp *args[4] = { dh_arg(t1, 1), dh_arg(t2, 2), \
dh_arg(t3, 3), dh_arg(t4, 4) }; \
tcg_gen_callN(tcg_ctx, HELPER(name), dh_retvar(ret), 4, args); \
}
@ -51,7 +51,7 @@ static inline void glue(gen_helper_, name)(TCGContext *tcg_ctx, dh_retvar_decl(r
dh_arg_decl(t1, 1), dh_arg_decl(t2, 2), dh_arg_decl(t3, 3), \
dh_arg_decl(t4, 4), dh_arg_decl(t5, 5)) \
{ \
TCGArg args[5] = { dh_arg(t1, 1), dh_arg(t2, 2), dh_arg(t3, 3), \
TCGTemp *args[5] = { dh_arg(t1, 1), dh_arg(t2, 2), dh_arg(t3, 3), \
dh_arg(t4, 4), dh_arg(t5, 5) }; \
tcg_gen_callN(tcg_ctx, HELPER(name), dh_retvar(ret), 5, args); \
}

12
qemu/include/exec/helper-head.h
View file

@ -77,11 +77,11 @@
#define dh_retvar_decl_ptr TCGv_ptr retval,
#define dh_retvar_decl(t) glue(dh_retvar_decl_, dh_alias(t))
#define dh_retvar_void TCG_CALL_DUMMY_ARG
#define dh_retvar_noreturn TCG_CALL_DUMMY_ARG
#define dh_retvar_i32 GET_TCGV_i32(retval)
#define dh_retvar_i64 GET_TCGV_i64(retval)
#define dh_retvar_ptr GET_TCGV_ptr(retval)
#define dh_retvar_void NULL
#define dh_retvar_noreturn NULL
#define dh_retvar_i32 tcgv_i32_temp(tcg_ctx, retval)
#define dh_retvar_i64 tcgv_i64_temp(tcg_ctx, retval)
#define dh_retvar_ptr tcgv_ptr_temp(tcg_ctx, retval)
#define dh_retvar(t) glue(dh_retvar_, dh_alias(t))
#define dh_is_64bit_void 0
@ -112,7 +112,7 @@
((dh_is_64bit(t) << (n*2)) | (dh_is_signed(t) << (n*2+1)))
#define dh_arg(t, n) \
glue(GET_TCGV_, dh_alias(t))(glue(arg, n))
glue(glue(tcgv_, dh_alias(t)), _temp)(tcg_ctx, glue(arg, n))
#define dh_arg_decl(t, n) glue(TCGv_, dh_alias(t)) glue(arg, n)

14
qemu/tcg/tcg-op.c
View file

@ -2471,7 +2471,7 @@ void tcg_gen_extrl_i64_i32(TCGContext *s, TCGv_i32 ret, TCGv_i64 arg)
tcg_gen_mov_i32(s, ret, TCGV_LOW(arg));
} else if (TCG_TARGET_HAS_extrl_i64_i32) {
tcg_gen_op2(s, INDEX_op_extrl_i64_i32,
GET_TCGV_I32(ret), GET_TCGV_I64(arg));
tcgv_i32_arg(ret), tcgv_i64_arg(arg));
} else {
tcg_gen_mov_i32(s, ret, MAKE_TCGV_I32(GET_TCGV_I64(arg)));
}
@ -2483,7 +2483,7 @@ void tcg_gen_extrh_i64_i32(TCGContext *s, TCGv_i32 ret, TCGv_i64 arg)
tcg_gen_mov_i32(s, ret, TCGV_HIGH(arg));
} else if (TCG_TARGET_HAS_extrh_i64_i32) {
tcg_gen_op2(s, INDEX_op_extrh_i64_i32,
GET_TCGV_I32(ret), GET_TCGV_I64(arg));
tcgv_i32_arg(ret), tcgv_i64_arg(arg));
} else {
TCGv_i64 t = tcg_temp_new_i64(s);
tcg_gen_shri_i64(s, t, arg, 32);
@ -2500,7 +2500,7 @@ void tcg_gen_extu_i32_i64(TCGContext *s, TCGv_i64 ret, TCGv_i32 arg)
tcg_gen_movi_i32(s, TCGV_HIGH(ret), 0);
} else {
tcg_gen_op2(s, INDEX_op_extu_i32_i64,
GET_TCGV_I64(ret), GET_TCGV_I32(arg));
tcgv_i64_arg(ret), tcgv_i32_arg(arg));
}
}
@ -2511,7 +2511,7 @@ void tcg_gen_ext_i32_i64(TCGContext *s, TCGv_i64 ret, TCGv_i32 arg)
tcg_gen_sari_i32(s, TCGV_HIGH(ret), TCGV_LOW(ret), 31);
} else {
tcg_gen_op2(s, INDEX_op_ext_i32_i64,
GET_TCGV_I64(ret), GET_TCGV_I32(arg));
tcgv_i64_arg(ret), tcgv_i32_arg(arg));
}
}
@ -2577,7 +2577,7 @@ void tcg_gen_lookup_and_goto_ptr(TCGContext *s)
if (TCG_TARGET_HAS_goto_ptr && !qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) {
TCGv_ptr ptr = tcg_temp_new_ptr(s);
gen_helper_lookup_tb_ptr(s, ptr, s->tcg_env);
tcg_gen_op1i(s, INDEX_op_goto_ptr, GET_TCGV_PTR(ptr));
tcg_gen_op1i(s, INDEX_op_goto_ptr, tcgv_ptr_arg(ptr));
tcg_temp_free_ptr(s, ptr);
} else {
tcg_gen_exit_tb(s, 0);
@ -2622,7 +2622,7 @@ static void gen_ldst_i32(TCGContext *s, TCGOpcode opc, TCGv_i32 val, TCGv addr,
if (TCG_TARGET_REG_BITS == 32) {
tcg_gen_op4i_i32(s, opc, val, TCGV_LOW(addr), TCGV_HIGH(addr), oi);
} else {
tcg_gen_op3(s, opc, GET_TCGV_I32(val), GET_TCGV_I64(addr), oi);
tcg_gen_op3(s, opc, tcgv_i32_arg(val), tcgv_i64_arg(addr), oi);
}
#endif
}
@ -2635,7 +2635,7 @@ static void gen_ldst_i64(TCGContext *s, TCGOpcode opc, TCGv_i64 val, TCGv addr,
if (TCG_TARGET_REG_BITS == 32) {
tcg_gen_op4i_i32(s, opc, TCGV_LOW(val), TCGV_HIGH(val), addr, oi);
} else {
tcg_gen_op3(s, opc, GET_TCGV_I64(val), GET_TCGV_I32(addr), oi);
tcg_gen_op3(s, opc, tcgv_i64_arg(val), tcgv_i32_arg(addr), oi);
}
#else
if (TCG_TARGET_REG_BITS == 32) {

100
qemu/tcg/tcg-op.h
View file

@ -47,12 +47,12 @@ static inline void gen_uc_tracecode(TCGContext *tcg_ctx, int32_t size, int32_t t
static inline void tcg_gen_op1_i32(TCGContext *s, TCGOpcode opc, TCGv_i32 a1)
{
tcg_gen_op1(s, opc, GET_TCGV_I32(a1));
tcg_gen_op1(s, opc, tcgv_i32_arg(a1));
}
static inline void tcg_gen_op1_i64(TCGContext *s, TCGOpcode opc, TCGv_i64 a1)
{
tcg_gen_op1(s, opc, GET_TCGV_I64(a1));
tcg_gen_op1(s, opc, tcgv_i64_arg(a1));
}
static inline void tcg_gen_op1i(TCGContext *s, TCGOpcode opc, TCGArg a1)
@ -62,22 +62,22 @@ static inline void tcg_gen_op1i(TCGContext *s, TCGOpcode opc, TCGArg a1)
static inline void tcg_gen_op2_i32(TCGContext *s, TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2)
{
tcg_gen_op2(s, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2));
tcg_gen_op2(s, opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2));
}
static inline void tcg_gen_op2_i64(TCGContext *s, TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2)
{
tcg_gen_op2(s, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2));
tcg_gen_op2(s, opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2));
}
static inline void tcg_gen_op2i_i32(TCGContext *s, TCGOpcode opc, TCGv_i32 a1, TCGArg a2)
{
tcg_gen_op2(s, opc, GET_TCGV_I32(a1), a2);
tcg_gen_op2(s, opc, tcgv_i32_arg(a1), a2);
}
static inline void tcg_gen_op2i_i64(TCGContext *s, TCGOpcode opc, TCGv_i64 a1, TCGArg a2)
{
tcg_gen_op2(s, opc, GET_TCGV_I64(a1), a2);
tcg_gen_op2(s, opc, tcgv_i64_arg(a1), a2);
}
static inline void tcg_gen_op2ii(TCGContext *s, TCGOpcode opc, TCGArg a1, TCGArg a2)
@ -88,173 +88,173 @@ static inline void tcg_gen_op2ii(TCGContext *s, TCGOpcode opc, TCGArg a1, TCGArg
static inline void tcg_gen_op3_i32(TCGContext *s, TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
TCGv_i32 a3)
{
tcg_gen_op3(s, opc, GET_TCGV_I32(a1),
GET_TCGV_I32(a2), GET_TCGV_I32(a3));
tcg_gen_op3(s, opc, tcgv_i32_arg(a1),
tcgv_i32_arg(a2), tcgv_i32_arg(a3));
}
static inline void tcg_gen_op3_i64(TCGContext *s, TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
TCGv_i64 a3)
{
tcg_gen_op3(s, opc, GET_TCGV_I64(a1),
GET_TCGV_I64(a2), GET_TCGV_I64(a3));
tcg_gen_op3(s, opc, tcgv_i64_arg(a1),
tcgv_i64_arg(a2), tcgv_i64_arg(a3));
}
static inline void tcg_gen_op3i_i32(TCGContext *s, TCGOpcode opc, TCGv_i32 a1,
TCGv_i32 a2, TCGArg a3)
{
tcg_gen_op3(s, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2), a3);
tcg_gen_op3(s, opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), a3);
}
static inline void tcg_gen_op3i_i64(TCGContext *s, TCGOpcode opc, TCGv_i64 a1,
TCGv_i64 a2, TCGArg a3)
{
tcg_gen_op3(s, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2), a3);
tcg_gen_op3(s, opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), a3);
}
static inline void tcg_gen_ldst_op_i32(TCGContext *s, TCGOpcode opc, TCGv_i32 val,
TCGv_ptr base, TCGArg offset)
{
tcg_gen_op3(s, opc, GET_TCGV_I32(val), GET_TCGV_PTR(base), offset);
tcg_gen_op3(s, opc, tcgv_i32_arg(val), tcgv_ptr_arg(base), offset);
}
static inline void tcg_gen_ldst_op_i64(TCGContext *s, TCGOpcode opc, TCGv_i64 val,
TCGv_ptr base, TCGArg offset)
{
tcg_gen_op3(s, opc, GET_TCGV_I64(val), GET_TCGV_PTR(base), offset);
tcg_gen_op3(s, opc, tcgv_i64_arg(val), tcgv_ptr_arg(base), offset);
}
static inline void tcg_gen_op4_i32(TCGContext *s, TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
TCGv_i32 a3, TCGv_i32 a4)
{
tcg_gen_op4(s, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
GET_TCGV_I32(a3), GET_TCGV_I32(a4));
tcg_gen_op4(s, opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
tcgv_i32_arg(a3), tcgv_i32_arg(a4));
}
static inline void tcg_gen_op4_i64(TCGContext *s, TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
TCGv_i64 a3, TCGv_i64 a4)
{
tcg_gen_op4(s, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
GET_TCGV_I64(a3), GET_TCGV_I64(a4));
tcg_gen_op4(s, opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
tcgv_i64_arg(a3), tcgv_i64_arg(a4));
}
static inline void tcg_gen_op4i_i32(TCGContext *s, TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
TCGv_i32 a3, TCGArg a4)
{
tcg_gen_op4(s, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
GET_TCGV_I32(a3), a4);
tcg_gen_op4(s, opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
tcgv_i32_arg(a3), a4);
}
static inline void tcg_gen_op4i_i64(TCGContext *s, TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
TCGv_i64 a3, TCGArg a4)
{
tcg_gen_op4(s, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
GET_TCGV_I64(a3), a4);
tcg_gen_op4(s, opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
tcgv_i64_arg(a3), a4);
}
static inline void tcg_gen_op4ii_i32(TCGContext *s, TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
TCGArg a3, TCGArg a4)
{
tcg_gen_op4(s, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2), a3, a4);
tcg_gen_op4(s, opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), a3, a4);
}
static inline void tcg_gen_op4ii_i64(TCGContext *s, TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
TCGArg a3, TCGArg a4)
{
tcg_gen_op4(s, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2), a3, a4);
tcg_gen_op4(s, opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), a3, a4);
}
static inline void tcg_gen_op5_i32(TCGContext *s, TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
TCGv_i32 a3, TCGv_i32 a4, TCGv_i32 a5)
{
tcg_gen_op5(s, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
GET_TCGV_I32(a3), GET_TCGV_I32(a4), GET_TCGV_I32(a5));
tcg_gen_op5(s, opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
tcgv_i32_arg(a3), tcgv_i32_arg(a4), tcgv_i32_arg(a5));
}
static inline void tcg_gen_op5_i64(TCGContext *s, TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
TCGv_i64 a3, TCGv_i64 a4, TCGv_i64 a5)
{
tcg_gen_op5(s, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
GET_TCGV_I64(a3), GET_TCGV_I64(a4), GET_TCGV_I64(a5));
tcg_gen_op5(s, opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5));
}
static inline void tcg_gen_op5i_i32(TCGContext *s, TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
TCGv_i32 a3, TCGv_i32 a4, TCGArg a5)
{
tcg_gen_op5(s, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
GET_TCGV_I32(a3), GET_TCGV_I32(a4), a5);
tcg_gen_op5(s, opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
tcgv_i32_arg(a3), tcgv_i32_arg(a4), a5);
}
static inline void tcg_gen_op5i_i64(TCGContext *s, TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
TCGv_i64 a3, TCGv_i64 a4, TCGArg a5)
{
tcg_gen_op5(s, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
GET_TCGV_I64(a3), GET_TCGV_I64(a4), a5);
tcg_gen_op5(s, opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
tcgv_i64_arg(a3), tcgv_i64_arg(a4), a5);
}
static inline void tcg_gen_op5ii_i32(TCGContext *s, TCGOpcode opc, TCGv_i32 a1,
TCGv_i32 a2, TCGv_i32 a3,
TCGArg a4, TCGArg a5)
{
tcg_gen_op5(s, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
GET_TCGV_I32(a3), a4, a5);
tcg_gen_op5(s, opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
tcgv_i32_arg(a3), a4, a5);
}
static inline void tcg_gen_op5ii_i64(TCGContext *s, TCGOpcode opc, TCGv_i64 a1,
TCGv_i64 a2, TCGv_i64 a3,
TCGArg a4, TCGArg a5)
{
tcg_gen_op5(s, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
GET_TCGV_I64(a3), a4, a5);
tcg_gen_op5(s, opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
tcgv_i64_arg(a3), a4, a5);
}
static inline void tcg_gen_op6_i32(TCGContext *s, TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
TCGv_i32 a3, TCGv_i32 a4, TCGv_i32 a5,
TCGv_i32 a6)
{
tcg_gen_op6(s, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
GET_TCGV_I32(a3), GET_TCGV_I32(a4), GET_TCGV_I32(a5),
GET_TCGV_I32(a6));
tcg_gen_op6(s, opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
tcgv_i32_arg(a3), tcgv_i32_arg(a4), tcgv_i32_arg(a5),
tcgv_i32_arg(a6));
}
static inline void tcg_gen_op6_i64(TCGContext *s, TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
TCGv_i64 a3, TCGv_i64 a4, TCGv_i64 a5,
TCGv_i64 a6)
{
tcg_gen_op6(s, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
GET_TCGV_I64(a3), GET_TCGV_I64(a4), GET_TCGV_I64(a5),
GET_TCGV_I64(a6));
tcg_gen_op6(s, opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5),
tcgv_i64_arg(a6));
}
static inline void tcg_gen_op6i_i32(TCGContext *s, TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
TCGv_i32 a3, TCGv_i32 a4,
TCGv_i32 a5, TCGArg a6)
{
tcg_gen_op6(s, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
GET_TCGV_I32(a3), GET_TCGV_I32(a4), GET_TCGV_I32(a5), a6);
tcg_gen_op6(s, opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
tcgv_i32_arg(a3), tcgv_i32_arg(a4), tcgv_i32_arg(a5), a6);
}
static inline void tcg_gen_op6i_i64(TCGContext *s, TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
TCGv_i64 a3, TCGv_i64 a4,
TCGv_i64 a5, TCGArg a6)
{
tcg_gen_op6(s, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
GET_TCGV_I64(a3), GET_TCGV_I64(a4), GET_TCGV_I64(a5), a6);
tcg_gen_op6(s, opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5), a6);
}
static inline void tcg_gen_op6ii_i32(TCGContext *s, TCGOpcode opc, TCGv_i32 a1,
TCGv_i32 a2, TCGv_i32 a3,
TCGv_i32 a4, TCGArg a5, TCGArg a6)
{
tcg_gen_op6(s, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
GET_TCGV_I32(a3), GET_TCGV_I32(a4), a5, a6);
tcg_gen_op6(s, opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
tcgv_i32_arg(a3), tcgv_i32_arg(a4), a5, a6);
}
static inline void tcg_gen_op6ii_i64(TCGContext *s, TCGOpcode opc, TCGv_i64 a1,
TCGv_i64 a2, TCGv_i64 a3,
TCGv_i64 a4, TCGArg a5, TCGArg a6)
{
tcg_gen_op6(s, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
GET_TCGV_I64(a3), GET_TCGV_I64(a4), a5, a6);
tcg_gen_op6(s, opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
tcgv_i64_arg(a3), tcgv_i64_arg(a4), a5, a6);
}
/* Generic ops. */

51
qemu/tcg/tcg.c
View file

@ -965,8 +965,7 @@ bool tcg_op_supported(TCGOpcode op)
/* Note: we convert the 64 bit args to 32 bit and do some alignment
and endian swap. Maybe it would be better to do the alignment
and endian swap in tcg_reg_alloc_call(). */
void tcg_gen_callN(TCGContext *s, void *func, TCGArg ret,
int nargs, TCGArg *args)
void tcg_gen_callN(TCGContext *s, void *func, TCGTemp *ret, int nargs, TCGTemp **args)
{
int i, real_args, nb_rets, pi;
unsigned sizemask, flags;
@ -984,7 +983,7 @@ void tcg_gen_callN(TCGContext *s, void *func, TCGArg ret,
int orig_sizemask = sizemask;
int orig_nargs = nargs;
TCGv_i64 retl, reth;
TCGArg split_args[MAX_OPC_PARAM];
TCGTemp *split_args[MAX_OPC_PARAM];
TCGV_UNUSED_I64(retl);
TCGV_UNUSED_I64(reth);
@ -992,12 +991,12 @@ void tcg_gen_callN(TCGContext *s, void *func, TCGArg ret,
for (i = real_args = 0; i < nargs; ++i) {
int is_64bit = sizemask & (1 << (i+1)*2);
if (is_64bit) {
TCGv_i64 orig = MAKE_TCGV_I64(args[i]);
TCGv_i64 orig = MAKE_TCGV_I64(temp_idx(s, args[i]));
TCGv_i32 h = tcg_temp_new_i32(s);
TCGv_i32 l = tcg_temp_new_i32(s);
tcg_gen_extr_i64_i32(l, h, orig);
split_args[real_args++] = GET_TCGV_I32(h);
split_args[real_args++] = GET_TCGV_I32(l);
split_args[real_args++] = tcgv_i32_temp(s, h);
split_args[real_args++] = tcgv_i32_temp(s, l);
} else {
split_args[real_args++] = args[i];
}
@ -1012,13 +1011,13 @@ void tcg_gen_callN(TCGContext *s, void *func, TCGArg ret,
int is_signed = sizemask & (2 << (i+1)*2);
if (!is_64bit) {
TCGv_i64 temp = tcg_temp_new_i64(s);
TCGv_i64 orig = MAKE_TCGV_I64(args[i]);
TCGv_i64 orig = MAKE_TCGV_I64(temp_idx(s, args[i]));
if (is_signed) {
tcg_gen_ext32s_i64(s, temp, orig);
} else {
tcg_gen_ext32u_i64(s, temp, orig);
}
args[i] = GET_TCGV_I64(temp);
args[i] = tcgv_i64_temp(s, temp);
}
}
#endif /* TCG_TARGET_EXTEND_ARGS */
@ -1036,7 +1035,7 @@ void tcg_gen_callN(TCGContext *s, void *func, TCGArg ret,
op->next = i + 1;
pi = 0;
if (ret != TCG_CALL_DUMMY_ARG) {
if (ret != NULL) {
#if defined(__sparc__) && !defined(__arch64__) \
&& !defined(CONFIG_TCG_INTERPRETER)
if (orig_sizemask & 1) {
@ -1045,25 +1044,25 @@ void tcg_gen_callN(TCGContext *s, void *func, TCGArg ret,
two return temporaries, and reassemble below. */
retl = tcg_temp_new_i64(s);
reth = tcg_temp_new_i64(s);
op->args[pi++] = GET_TCGV_I64(reth);
op->args[pi++] = GET_TCGV_I64(retl);
op->args[pi++] = tcgv_i64_arg(reth);
op->args[pi++] = tcgv_i64_arg(retl);
nb_rets = 2;
} else {
op->args[pi++] = ret;
op->args[pi++] = temp_arg(s, ret);
nb_rets = 1;
}
#else
if (TCG_TARGET_REG_BITS < 64 && (sizemask & 1)) {
#ifdef HOST_WORDS_BIGENDIAN
op->args[pi++] = ret + 1;
op->args[pi++] = ret;
op->args[pi++] = temp_arg(s, ret + 1);
op->args[pi++] = temp_arg(s, ret);
#else
op->args[pi++] = ret;
op->args[pi++] = ret + 1;
op->args[pi++] = temp_arg(s, ret);
op->args[pi++] = temp_arg(s, ret + 1);
#endif
nb_rets = 2;
} else {
op->args[pi++] = ret;
op->args[pi++] = temp_arg(s, ret);
nb_rets = 1;
}
#endif
@ -1094,17 +1093,17 @@ void tcg_gen_callN(TCGContext *s, void *func, TCGArg ret,
have to get more complicated to differentiate between
stack arguments and register arguments. */
#if defined(HOST_WORDS_BIGENDIAN) != defined(TCG_TARGET_STACK_GROWSUP)
op->args[pi++] = args[i] + 1;
op->args[pi++] = args[i];
op->args[pi++] = temp_arg(s, args[i] + 1);
op->args[pi++] = temp_arg(s, args[i]);
#else
op->args[pi++] = args[i];
op->args[pi++] = args[i] + 1;
op->args[pi++] = temp_arg(s, args[i]);
op->args[pi++] = temp_arg(s, args[i] + 1);
#endif
real_args += 2;
continue;
}
op->args[pi++] = args[i];
op->args[pi++] = temp_arg(s, args[i]);
real_args++;
}
op->args[pi++] = (uintptr_t)func;
@ -1120,8 +1119,8 @@ void tcg_gen_callN(TCGContext *s, void *func, TCGArg ret,
for (i = real_args = 0; i < orig_nargs; ++i) {
int is_64bit = orig_sizemask & (1 << (i+1)*2);
if (is_64bit) {
TCGv_i32 h = MAKE_TCGV_I32(args[real_args++]);
TCGv_i32 l = MAKE_TCGV_I32(args[real_args++]);
TCGv_i32 h = MAKE_TCGV_I32(temp_idx(s, args[real_args++]));
TCGv_i32 l = MAKE_TCGV_I32(temp_idx(s, args[real_args++]));
tcg_temp_free_i32(s, h);
tcg_temp_free_i32(s, l);
} else {
@ -1132,7 +1131,7 @@ void tcg_gen_callN(TCGContext *s, void *func, TCGArg ret,
/* The 32-bit ABI returned two 32-bit pieces. Re-assemble them.
Note that describing these as TCGv_i64 eliminates an unnecessary
zero-extension that tcg_gen_concat_i32_i64 would create. */
tcg_gen_concat32_i64(MAKE_TCGV_I64(ret), retl, reth);
tcg_gen_concat32_i64(s, MAKE_TCGV_I64(temp_idx(s, ret)), retl, reth);
tcg_temp_free_i64(s, retl);
tcg_temp_free_i64(s, reth);
}
@ -1140,7 +1139,7 @@ void tcg_gen_callN(TCGContext *s, void *func, TCGArg ret,
for (i = 0; i < nargs; ++i) {
int is_64bit = sizemask & (1 << (i+1)*2);
if (!is_64bit) {
TCGv_i64 temp = MAKE_TCGV_I64(args[i]);
TCGv_i64 temp = MAKE_TCGV_I64(temp_idx(s, args[i]));
tcg_temp_free_i64(s, temp);
}
}

33
qemu/tcg/tcg.h
View file

@ -1014,6 +1014,36 @@ static inline size_t arg_index(TCGArg a)
return a;
}
static inline TCGArg tcgv_i32_arg(TCGv_i32 t)
{
return (intptr_t)t;
}
static inline TCGArg tcgv_i64_arg(TCGv_i64 t)
{
return (intptr_t)t;
}
static inline TCGArg tcgv_ptr_arg(TCGv_ptr t)
{
return (intptr_t)t;
}
static inline TCGTemp *tcgv_i32_temp(TCGContext *s, TCGv_i32 t)
{
return arg_temp(s, tcgv_i32_arg(t));
}
static inline TCGTemp *tcgv_i64_temp(TCGContext *s, TCGv_i64 t)
{
return arg_temp(s, tcgv_i64_arg(t));
}
static inline TCGTemp *tcgv_ptr_temp(TCGContext *s, TCGv_ptr t)
{
return arg_temp(s, tcgv_ptr_arg(t));
}
static inline void tcg_set_insn_param(TCGContext *tcg_ctx, int op_idx, int arg, TCGArg v)
{
tcg_ctx->gen_op_buf[op_idx].args[arg] = v;
@ -1072,8 +1102,7 @@ do {\
bool tcg_op_supported(TCGOpcode op);
void tcg_gen_callN(TCGContext *s, void *func,
TCGArg ret, int nargs, TCGArg *args);
void tcg_gen_callN(TCGContext *s, void *func, TCGTemp *ret, int nargs, TCGTemp **args);
void tcg_op_remove(TCGContext *s, TCGOp *op);
TCGOp *tcg_op_insert_before(TCGContext *s, TCGOp *op, TCGOpcode opc, int narg);