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target-mips: save cpu state before calling MSA load and store helpers

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PC needs to be saved if an exception can be generated by an helper.
This fixes a problem related to resuming the execution at unexpected address
after an exception (caused by MSA load/store instruction) has been serviced.

Backports commit 0af7a37054310384e00209e0a43efe95b7c19ef0 from qemu
This commit is contained in:
Leon Alrae 2018-02-12 16:30:55 -05:00 committed by Lioncash
parent 6cd0c5d775
commit 2d07e60f61
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 2 additions and 0 deletions
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qemu/target-mips/translate.c
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@ -18567,12 +18567,14 @@ static void gen_msa(CPUMIPSState *env, DisasContext *ctx)
case OPC_LD_H:
case OPC_LD_W:
case OPC_LD_D:
save_cpu_state(ctx, 1);
gen_helper_msa_ld_df(tcg_ctx, tcg_ctx->cpu_env, tdf, twd, trs, ts10);
break;
case OPC_ST_B:
case OPC_ST_H:
case OPC_ST_W:
case OPC_ST_D:
save_cpu_state(ctx, 1);
gen_helper_msa_st_df(tcg_ctx, tcg_ctx->cpu_env, tdf, twd, trs, ts10);
break;
}