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target/arm: Correct typo in HAMAIR1 regdef name

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We implement the HAMAIR1 register as RAZ/WI; we had a typo in the
regdef, though, and were incorrectly naming it HMAIR1 (which is
a different register which we also implement as RAZ/WI).

Backports commit 55b53c718b2f684793eeefcf1c1a548ee97e23aa from qemu
This commit is contained in:
Peter Maydell 2018-08-22 12:33:36 -04:00 committed by Lioncash
parent 0e2dc93e5f
commit 2d2c6982ce
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 2 additions and 2 deletions
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4
qemu/target/arm/helper.c
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@ -3360,7 +3360,7 @@ static const ARMCPRegInfo el3_no_el2_cp_reginfo[] = {
PL2_RW, 0, NULL, 0 },
{ "AMAIR_EL2", 0,10,3, 3,4,0, ARM_CP_STATE_BOTH, ARM_CP_CONST,
PL2_RW, 0, NULL, 0 },
{ "HMAIR1", 0,10,3, 0,4,1, ARM_CP_STATE_AA32, ARM_CP_CONST,
{ "HAMAIR1", 0,10,3, 0,4,1, ARM_CP_STATE_AA32, ARM_CP_CONST,
PL2_RW, 0, NULL, 0 },
{ "AFSR0_EL2", 0,5,1, 3,4,0, ARM_CP_STATE_BOTH, ARM_CP_CONST,
PL2_RW, 0, NULL, 0 },
@ -3468,7 +3468,7 @@ static const ARMCPRegInfo el2_cp_reginfo[] = {
{ "AMAIR_EL2", 0,10,3, 3,4,0, ARM_CP_STATE_BOTH, ARM_CP_CONST,
PL2_RW, 0, NULL, 0 },
/* HAMAIR1 is mapped to AMAIR_EL2[63:32] */
{ "HMAIR1", 0,10,3, 0,4,1, ARM_CP_STATE_AA32, ARM_CP_CONST,
{ "HAMAIR1", 0,10,3, 0,4,1, ARM_CP_STATE_AA32, ARM_CP_CONST,
PL2_RW, 0, NULL, 0 },
{ "AFSR0_EL2", 0,5,1, 3,4,0, ARM_CP_STATE_BOTH, ARM_CP_CONST,
PL2_RW, 0, NULL, 0 },