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m68k: remove useless parameter op_size from gen_lea_indexed()
Backports commit a435612616202c837d62626dbe3e33a4e9a95772 from qemu
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18e3e405c4
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@ -276,8 +276,7 @@ static TCGv gen_addr_index(DisasContext *s, uint16_t ext, TCGv tmp)
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/* Handle a base + index + displacement effective addresss.
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/* Handle a base + index + displacement effective addresss.
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A NULL_QREG base means pc-relative. */
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A NULL_QREG base means pc-relative. */
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static TCGv gen_lea_indexed(CPUM68KState *env, DisasContext *s, int opsize,
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static TCGv gen_lea_indexed(CPUM68KState *env, DisasContext *s, TCGv base)
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TCGv base)
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{
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{
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TCGContext *tcg_ctx = s->uc->tcg_ctx;
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TCGContext *tcg_ctx = s->uc->tcg_ctx;
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uint32_t offset;
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uint32_t offset;
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@ -519,7 +518,7 @@ static TCGv gen_lea(CPUM68KState *env, DisasContext *s, uint16_t insn,
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return tmp;
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return tmp;
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case 6: /* Indirect index + displacement. */
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case 6: /* Indirect index + displacement. */
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reg = AREG(insn, 0);
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reg = AREG(insn, 0);
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return gen_lea_indexed(env, s, opsize, reg);
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return gen_lea_indexed(env, s, reg);
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case 7: /* Other */
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case 7: /* Other */
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switch (insn & 7) {
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switch (insn & 7) {
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case 0: /* Absolute short. */
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case 0: /* Absolute short. */
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@ -535,7 +534,7 @@ static TCGv gen_lea(CPUM68KState *env, DisasContext *s, uint16_t insn,
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s->pc += 2;
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s->pc += 2;
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return tcg_const_i32(tcg_ctx, offset);
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return tcg_const_i32(tcg_ctx, offset);
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case 3: /* pc index+displacement. */
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case 3: /* pc index+displacement. */
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return gen_lea_indexed(env, s, opsize, *(TCGv *)tcg_ctx->NULL_QREG);
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return gen_lea_indexed(env, s, *(TCGv *)tcg_ctx->NULL_QREG);
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case 4: /* Immediate. */
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case 4: /* Immediate. */
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default:
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default:
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return *(TCGv *)tcg_ctx->NULL_QREG;
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return *(TCGv *)tcg_ctx->NULL_QREG;
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