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exec.c: Pass MemTxAttrs to iotlb_to_region so it uses the right AS

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Pass the MemTxAttrs for the memory access to iotlb_to_region(); this
allows it to determine the correct AddressSpace to use for the lookup.

Backports commit a54c87b68a0410d0cf6f8b84e42074a5cf463732 from qemu
This commit is contained in:
Peter Maydell 2018-02-17 23:18:53 -05:00 committed by Lioncash
parent 8edd6ffdfd
commit 2fe995a0da
No known key found for this signature in database
GPG key ID: 4E3C3CC1031BA9C7
4 changed files with 10 additions and 7 deletions
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6
qemu/cputlb.c
View file

@ -289,6 +289,7 @@ tb_page_addr_t get_page_addr_code(CPUArchState *env1, target_ulong addr)
MemoryRegion *mr;
ram_addr_t ram_addr;
CPUState *cpu = ENV_GET_CPU(env1);
CPUIOTLBEntry *iotlbentry;
page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
mmu_idx = cpu_mmu_index(env1, true);
@ -300,8 +301,9 @@ tb_page_addr_t get_page_addr_code(CPUArchState *env1, target_ulong addr)
return -1;
}
}
pd = env1->iotlb[mmu_idx][page_index].addr & ~TARGET_PAGE_MASK;
mr = iotlb_to_region(cpu, pd);
iotlbentry = &env1->iotlb[mmu_idx][page_index];
pd = iotlbentry->addr & ~TARGET_PAGE_MASK;
mr = iotlb_to_region(cpu, pd, iotlbentry->attrs);
if (memory_region_is_unassigned(cpu->uc, mr)) {
CPUClass *cc = CPU_GET_CLASS(env1->uc, cpu);

5
qemu/exec.c
View file

@ -1592,9 +1592,10 @@ static uint16_t dummy_section(PhysPageMap *map, AddressSpace *as,
return phys_section_add(map, &section);
}
MemoryRegion *iotlb_to_region(CPUState *cpu, hwaddr index)
MemoryRegion *iotlb_to_region(CPUState *cpu, hwaddr index, MemTxAttrs attrs)
{
CPUAddressSpace *cpuas = &cpu->cpu_ases[0];
int asidx = cpu_asidx_from_attrs(cpu, attrs);
CPUAddressSpace *cpuas = &cpu->cpu_ases[asidx];
AddressSpaceDispatch *d = cpuas->memory_dispatch;
MemoryRegionSection *sections = d->map.sections;

2
qemu/include/exec/exec-all.h
View file

@ -406,7 +406,7 @@ extern uintptr_t tci_tb_ptr;
void phys_mem_set_alloc(void *(*alloc)(size_t, uint64_t *align));
struct MemoryRegion *iotlb_to_region(CPUState *cpu,
hwaddr index);
hwaddr index, MemTxAttrs attrs);
void tlb_fill(CPUState *cpu, target_ulong addr, int is_write, int mmu_idx,
uintptr_t retaddr);

4
qemu/softmmu_template.h
View file

@ -164,7 +164,7 @@ static inline DATA_TYPE glue(io_read, SUFFIX)(CPUArchState *env,
uint64_t val;
CPUState *cpu = ENV_GET_CPU(env);
hwaddr physaddr = iotlbentry->addr;
MemoryRegion *mr = iotlb_to_region(cpu, physaddr);
MemoryRegion *mr = iotlb_to_region(cpu, physaddr, iotlbentry->attrs);
physaddr = (physaddr & TARGET_PAGE_MASK) + addr;
cpu->mem_io_pc = retaddr;
@ -652,7 +652,7 @@ static inline void glue(io_write, SUFFIX)(CPUArchState *env,
{
CPUState *cpu = ENV_GET_CPU(env);
hwaddr physaddr = iotlbentry->addr;
MemoryRegion *mr = iotlb_to_region(cpu, physaddr);
MemoryRegion *mr = iotlb_to_region(cpu, physaddr, iotlbentry->attrs);
physaddr = (physaddr & TARGET_PAGE_MASK) + addr;
if (mr != &(cpu->uc->io_mem_rom) && mr != &(cpu->uc->io_mem_notdirty)