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target-arm: Add missing SP_ELx register definition

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Added CP register definitions for SP_EL1 and SP_EL2.

Backports commit 884b4deeeb8b158ed3db5792161902bc8b41b62d from qemu
This commit is contained in:
Greg Bellows 2018-02-12 10:38:12 -05:00 committed by Lioncash
parent cce21771b3
commit 301c3737e3
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 4 additions and 0 deletions
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4
qemu/target-arm/helper.c
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@ -1997,6 +1997,8 @@ static const ARMCPRegInfo v8_cp_reginfo[] = {
{ "SP_EL0", 0,4,1, 3,0,0, ARM_CP_STATE_AA64,
ARM_CP_NO_MIGRATE, PL1_RW, 0, NULL, 0, offsetof(CPUARMState, sp_el[0]), {0, 0},
sp_el0_access, },
{ "SP_EL1", 0,4,1, 3,4,0, ARM_CP_STATE_AA64, ARM_CP_NO_MIGRATE,
PL2_RW, 0, NULL, 0, offsetof(CPUARMState, sp_el[1]) },
{ "SPSel", 0,4,2, 3,0,0, ARM_CP_STATE_AA64,
ARM_CP_NO_MIGRATE, PL1_RW, 0, NULL, 0, 0, {0, 0},
NULL, spsel_read, spsel_write },
@ -2059,6 +2061,8 @@ static const ARMCPRegInfo v8_el2_cp_reginfo[] = {
{ "VBAR_EL2", 0,12,0, 3,4,0, ARM_CP_STATE_AA64,
0, PL2_RW, 0, NULL, 0, offsetof(CPUARMState, cp15.vbar_el[2]), {0, 0},
NULL, NULL, vbar_write, },
{ "SP_EL2", 0,4,1, 3,6,0, ARM_CP_STATE_AA64, ARM_CP_NO_MIGRATE,
PL3_RW, 0, NULL, 0, offsetof(CPUARMState, sp_el[2]) },
REGINFO_SENTINEL
};