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target/riscv: vector floating-point sign-injection instructions

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Backports 1d426b81f71eeeb1cbfec76c2f27ed0495719fb0
This commit is contained in:
LIU Zhiwei 2021-03-07 11:43:45 -05:00 committed by Lioncash
parent f7f0425a4d
commit 31978f270b
7 changed files with 172 additions and 0 deletions
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18
qemu/header_gen.py
View file

@ -7106,6 +7106,24 @@ riscv_symbols = (
'helper_vfmax_vf_h',
'helper_vfmax_vf_w',
'helper_vfmax_vf_d',
'helper_vfsgnj_vv_h',
'helper_vfsgnj_vv_w',
'helper_vfsgnj_vv_d',
'helper_vfsgnjn_vv_h',
'helper_vfsgnjn_vv_w',
'helper_vfsgnjn_vv_d',
'helper_vfsgnjx_vv_h',
'helper_vfsgnjx_vv_w',
'helper_vfsgnjx_vv_d',
'helper_vfsgnj_vf_h',
'helper_vfsgnj_vf_w',
'helper_vfsgnj_vf_d',
'helper_vfsgnjn_vf_h',
'helper_vfsgnjn_vf_w',
'helper_vfsgnjn_vf_d',
'helper_vfsgnjx_vf_h',
'helper_vfsgnjx_vf_w',
'helper_vfsgnjx_vf_d',
'pmp_hart_has_privs',
'pmpaddr_csr_read',
'pmpaddr_csr_write',

18
qemu/riscv32.h
View file

@ -4542,6 +4542,24 @@
#define helper_vfmax_vf_h helper_vfmax_vf_h_riscv32
#define helper_vfmax_vf_w helper_vfmax_vf_w_riscv32
#define helper_vfmax_vf_d helper_vfmax_vf_d_riscv32
#define helper_vfsgnj_vv_h helper_vfsgnj_vv_h_riscv32
#define helper_vfsgnj_vv_w helper_vfsgnj_vv_w_riscv32
#define helper_vfsgnj_vv_d helper_vfsgnj_vv_d_riscv32
#define helper_vfsgnjn_vv_h helper_vfsgnjn_vv_h_riscv32
#define helper_vfsgnjn_vv_w helper_vfsgnjn_vv_w_riscv32
#define helper_vfsgnjn_vv_d helper_vfsgnjn_vv_d_riscv32
#define helper_vfsgnjx_vv_h helper_vfsgnjx_vv_h_riscv32
#define helper_vfsgnjx_vv_w helper_vfsgnjx_vv_w_riscv32
#define helper_vfsgnjx_vv_d helper_vfsgnjx_vv_d_riscv32
#define helper_vfsgnj_vf_h helper_vfsgnj_vf_h_riscv32
#define helper_vfsgnj_vf_w helper_vfsgnj_vf_w_riscv32
#define helper_vfsgnj_vf_d helper_vfsgnj_vf_d_riscv32
#define helper_vfsgnjn_vf_h helper_vfsgnjn_vf_h_riscv32
#define helper_vfsgnjn_vf_w helper_vfsgnjn_vf_w_riscv32
#define helper_vfsgnjn_vf_d helper_vfsgnjn_vf_d_riscv32
#define helper_vfsgnjx_vf_h helper_vfsgnjx_vf_h_riscv32
#define helper_vfsgnjx_vf_w helper_vfsgnjx_vf_w_riscv32
#define helper_vfsgnjx_vf_d helper_vfsgnjx_vf_d_riscv32
#define pmp_hart_has_privs pmp_hart_has_privs_riscv32
#define pmpaddr_csr_read pmpaddr_csr_read_riscv32
#define pmpaddr_csr_write pmpaddr_csr_write_riscv32

18
qemu/riscv64.h
View file

@ -4542,6 +4542,24 @@
#define helper_vfmax_vf_h helper_vfmax_vf_h_riscv64
#define helper_vfmax_vf_w helper_vfmax_vf_w_riscv64
#define helper_vfmax_vf_d helper_vfmax_vf_d_riscv64
#define helper_vfsgnj_vv_h helper_vfsgnj_vv_h_riscv64
#define helper_vfsgnj_vv_w helper_vfsgnj_vv_w_riscv64
#define helper_vfsgnj_vv_d helper_vfsgnj_vv_d_riscv64
#define helper_vfsgnjn_vv_h helper_vfsgnjn_vv_h_riscv64
#define helper_vfsgnjn_vv_w helper_vfsgnjn_vv_w_riscv64
#define helper_vfsgnjn_vv_d helper_vfsgnjn_vv_d_riscv64
#define helper_vfsgnjx_vv_h helper_vfsgnjx_vv_h_riscv64
#define helper_vfsgnjx_vv_w helper_vfsgnjx_vv_w_riscv64
#define helper_vfsgnjx_vv_d helper_vfsgnjx_vv_d_riscv64
#define helper_vfsgnj_vf_h helper_vfsgnj_vf_h_riscv64
#define helper_vfsgnj_vf_w helper_vfsgnj_vf_w_riscv64
#define helper_vfsgnj_vf_d helper_vfsgnj_vf_d_riscv64
#define helper_vfsgnjn_vf_h helper_vfsgnjn_vf_h_riscv64
#define helper_vfsgnjn_vf_w helper_vfsgnjn_vf_w_riscv64
#define helper_vfsgnjn_vf_d helper_vfsgnjn_vf_d_riscv64
#define helper_vfsgnjx_vf_h helper_vfsgnjx_vf_h_riscv64
#define helper_vfsgnjx_vf_w helper_vfsgnjx_vf_w_riscv64
#define helper_vfsgnjx_vf_d helper_vfsgnjx_vf_d_riscv64
#define pmp_hart_has_privs pmp_hart_has_privs_riscv64
#define pmpaddr_csr_read pmpaddr_csr_read_riscv64
#define pmpaddr_csr_write pmpaddr_csr_write_riscv64

19
qemu/target/riscv/helper.h
View file

@ -943,3 +943,22 @@ DEF_HELPER_6(vfmin_vf_d, void, ptr, ptr, i64, ptr, env, i32)
DEF_HELPER_6(vfmax_vf_h, void, ptr, ptr, i64, ptr, env, i32)
DEF_HELPER_6(vfmax_vf_w, void, ptr, ptr, i64, ptr, env, i32)
DEF_HELPER_6(vfmax_vf_d, void, ptr, ptr, i64, ptr, env, i32)
DEF_HELPER_6(vfsgnj_vv_h, void, ptr, ptr, ptr, ptr, env, i32)
DEF_HELPER_6(vfsgnj_vv_w, void, ptr, ptr, ptr, ptr, env, i32)
DEF_HELPER_6(vfsgnj_vv_d, void, ptr, ptr, ptr, ptr, env, i32)
DEF_HELPER_6(vfsgnjn_vv_h, void, ptr, ptr, ptr, ptr, env, i32)
DEF_HELPER_6(vfsgnjn_vv_w, void, ptr, ptr, ptr, ptr, env, i32)
DEF_HELPER_6(vfsgnjn_vv_d, void, ptr, ptr, ptr, ptr, env, i32)
DEF_HELPER_6(vfsgnjx_vv_h, void, ptr, ptr, ptr, ptr, env, i32)
DEF_HELPER_6(vfsgnjx_vv_w, void, ptr, ptr, ptr, ptr, env, i32)
DEF_HELPER_6(vfsgnjx_vv_d, void, ptr, ptr, ptr, ptr, env, i32)
DEF_HELPER_6(vfsgnj_vf_h, void, ptr, ptr, i64, ptr, env, i32)
DEF_HELPER_6(vfsgnj_vf_w, void, ptr, ptr, i64, ptr, env, i32)
DEF_HELPER_6(vfsgnj_vf_d, void, ptr, ptr, i64, ptr, env, i32)
DEF_HELPER_6(vfsgnjn_vf_h, void, ptr, ptr, i64, ptr, env, i32)
DEF_HELPER_6(vfsgnjn_vf_w, void, ptr, ptr, i64, ptr, env, i32)
DEF_HELPER_6(vfsgnjn_vf_d, void, ptr, ptr, i64, ptr, env, i32)
DEF_HELPER_6(vfsgnjx_vf_h, void, ptr, ptr, i64, ptr, env, i32)
DEF_HELPER_6(vfsgnjx_vf_w, void, ptr, ptr, i64, ptr, env, i32)
DEF_HELPER_6(vfsgnjx_vf_d, void, ptr, ptr, i64, ptr, env, i32)

6
qemu/target/riscv/insn32.decode
View file

@ -496,6 +496,12 @@ vfmin_vv 000100 . ..... ..... 001 ..... 1010111 @r_vm
vfmin_vf 000100 . ..... ..... 101 ..... 1010111 @r_vm
vfmax_vv 000110 . ..... ..... 001 ..... 1010111 @r_vm
vfmax_vf 000110 . ..... ..... 101 ..... 1010111 @r_vm
vfsgnj_vv 001000 . ..... ..... 001 ..... 1010111 @r_vm
vfsgnj_vf 001000 . ..... ..... 101 ..... 1010111 @r_vm
vfsgnjn_vv 001001 . ..... ..... 001 ..... 1010111 @r_vm
vfsgnjn_vf 001001 . ..... ..... 101 ..... 1010111 @r_vm
vfsgnjx_vv 001010 . ..... ..... 001 ..... 1010111 @r_vm
vfsgnjx_vf 001010 . ..... ..... 101 ..... 1010111 @r_vm
vsetvli 0 ........... ..... 111 ..... 1010111 @r2_zimm
vsetvl 1000000 ..... ..... 111 ..... 1010111 @r

8
qemu/target/riscv/insn_trans/trans_rvv.inc.c
View file

@ -2171,3 +2171,11 @@ GEN_OPFVV_TRANS(vfmin_vv, opfvv_check)
GEN_OPFVV_TRANS(vfmax_vv, opfvv_check)
GEN_OPFVF_TRANS(vfmin_vf, opfvf_check)
GEN_OPFVF_TRANS(vfmax_vf, opfvf_check)
/* Vector Floating-Point Sign-Injection Instructions */
GEN_OPFVV_TRANS(vfsgnj_vv, opfvv_check)
GEN_OPFVV_TRANS(vfsgnjn_vv, opfvv_check)
GEN_OPFVV_TRANS(vfsgnjx_vv, opfvv_check)
GEN_OPFVF_TRANS(vfsgnj_vf, opfvf_check)
GEN_OPFVF_TRANS(vfsgnjn_vf, opfvf_check)
GEN_OPFVF_TRANS(vfsgnjx_vf, opfvf_check)

85
qemu/target/riscv/vector_helper.c
View file

@ -3845,3 +3845,88 @@ RVVCALL(OPFVF2, vfmax_vf_d, OP_UUU_D, H8, H8, float64_maxnum)
GEN_VEXT_VF(vfmax_vf_h, 2, 2, clearh)
GEN_VEXT_VF(vfmax_vf_w, 4, 4, clearl)
GEN_VEXT_VF(vfmax_vf_d, 8, 8, clearq)
/* Vector Floating-Point Sign-Injection Instructions */
static uint16_t fsgnj16(uint16_t a, uint16_t b, float_status *s)
{
return deposit64(b, 0, 15, a);
}
static uint32_t fsgnj32(uint32_t a, uint32_t b, float_status *s)
{
return deposit64(b, 0, 31, a);
}
static uint64_t fsgnj64(uint64_t a, uint64_t b, float_status *s)
{
return deposit64(b, 0, 63, a);
}
RVVCALL(OPFVV2, vfsgnj_vv_h, OP_UUU_H, H2, H2, H2, fsgnj16)
RVVCALL(OPFVV2, vfsgnj_vv_w, OP_UUU_W, H4, H4, H4, fsgnj32)
RVVCALL(OPFVV2, vfsgnj_vv_d, OP_UUU_D, H8, H8, H8, fsgnj64)
GEN_VEXT_VV_ENV(vfsgnj_vv_h, 2, 2, clearh)
GEN_VEXT_VV_ENV(vfsgnj_vv_w, 4, 4, clearl)
GEN_VEXT_VV_ENV(vfsgnj_vv_d, 8, 8, clearq)
RVVCALL(OPFVF2, vfsgnj_vf_h, OP_UUU_H, H2, H2, fsgnj16)
RVVCALL(OPFVF2, vfsgnj_vf_w, OP_UUU_W, H4, H4, fsgnj32)
RVVCALL(OPFVF2, vfsgnj_vf_d, OP_UUU_D, H8, H8, fsgnj64)
GEN_VEXT_VF(vfsgnj_vf_h, 2, 2, clearh)
GEN_VEXT_VF(vfsgnj_vf_w, 4, 4, clearl)
GEN_VEXT_VF(vfsgnj_vf_d, 8, 8, clearq)
static uint16_t fsgnjn16(uint16_t a, uint16_t b, float_status *s)
{
return deposit64(~b, 0, 15, a);
}
static uint32_t fsgnjn32(uint32_t a, uint32_t b, float_status *s)
{
return deposit64(~b, 0, 31, a);
}
static uint64_t fsgnjn64(uint64_t a, uint64_t b, float_status *s)
{
return deposit64(~b, 0, 63, a);
}
RVVCALL(OPFVV2, vfsgnjn_vv_h, OP_UUU_H, H2, H2, H2, fsgnjn16)
RVVCALL(OPFVV2, vfsgnjn_vv_w, OP_UUU_W, H4, H4, H4, fsgnjn32)
RVVCALL(OPFVV2, vfsgnjn_vv_d, OP_UUU_D, H8, H8, H8, fsgnjn64)
GEN_VEXT_VV_ENV(vfsgnjn_vv_h, 2, 2, clearh)
GEN_VEXT_VV_ENV(vfsgnjn_vv_w, 4, 4, clearl)
GEN_VEXT_VV_ENV(vfsgnjn_vv_d, 8, 8, clearq)
RVVCALL(OPFVF2, vfsgnjn_vf_h, OP_UUU_H, H2, H2, fsgnjn16)
RVVCALL(OPFVF2, vfsgnjn_vf_w, OP_UUU_W, H4, H4, fsgnjn32)
RVVCALL(OPFVF2, vfsgnjn_vf_d, OP_UUU_D, H8, H8, fsgnjn64)
GEN_VEXT_VF(vfsgnjn_vf_h, 2, 2, clearh)
GEN_VEXT_VF(vfsgnjn_vf_w, 4, 4, clearl)
GEN_VEXT_VF(vfsgnjn_vf_d, 8, 8, clearq)
static uint16_t fsgnjx16(uint16_t a, uint16_t b, float_status *s)
{
return deposit64(b ^ a, 0, 15, a);
}
static uint32_t fsgnjx32(uint32_t a, uint32_t b, float_status *s)
{
return deposit64(b ^ a, 0, 31, a);
}
static uint64_t fsgnjx64(uint64_t a, uint64_t b, float_status *s)
{
return deposit64(b ^ a, 0, 63, a);
}
RVVCALL(OPFVV2, vfsgnjx_vv_h, OP_UUU_H, H2, H2, H2, fsgnjx16)
RVVCALL(OPFVV2, vfsgnjx_vv_w, OP_UUU_W, H4, H4, H4, fsgnjx32)
RVVCALL(OPFVV2, vfsgnjx_vv_d, OP_UUU_D, H8, H8, H8, fsgnjx64)
GEN_VEXT_VV_ENV(vfsgnjx_vv_h, 2, 2, clearh)
GEN_VEXT_VV_ENV(vfsgnjx_vv_w, 4, 4, clearl)
GEN_VEXT_VV_ENV(vfsgnjx_vv_d, 8, 8, clearq)
RVVCALL(OPFVF2, vfsgnjx_vf_h, OP_UUU_H, H2, H2, fsgnjx16)
RVVCALL(OPFVF2, vfsgnjx_vf_w, OP_UUU_W, H4, H4, fsgnjx32)
RVVCALL(OPFVF2, vfsgnjx_vf_d, OP_UUU_D, H8, H8, fsgnjx64)
GEN_VEXT_VF(vfsgnjx_vf_h, 2, 2, clearh)
GEN_VEXT_VF(vfsgnjx_vf_w, 4, 4, clearl)
GEN_VEXT_VF(vfsgnjx_vf_d, 8, 8, clearq)