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mips: split cpu_mips_realize_env() out of cpu_mips_init()
so it can be used in mips_cpu_realizefn() in the next commit Backports commit 27e38392ca07f97edfb2257b6a1394a04d84e8d5 from qemu
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c4f351394f
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@ -3510,6 +3510,7 @@ mips_symbols = (
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'cpu_mips_kseg0_to_phys',
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'cpu_mips_kseg0_to_phys',
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'cpu_mips_kvm_um_phys_to_kseg0',
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'cpu_mips_kvm_um_phys_to_kseg0',
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'cpu_mips_phys_to_kseg0',
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'cpu_mips_phys_to_kseg0',
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'cpu_mips_realize_env',
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'cpu_mips_start_count',
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'cpu_mips_start_count',
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'cpu_mips_stop_count',
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'cpu_mips_stop_count',
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'cpu_mips_store_cause',
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'cpu_mips_store_cause',
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@ -3444,6 +3444,7 @@
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#define cpu_mips_kseg0_to_phys cpu_mips_kseg0_to_phys_mips
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#define cpu_mips_kseg0_to_phys cpu_mips_kseg0_to_phys_mips
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#define cpu_mips_kvm_um_phys_to_kseg0 cpu_mips_kvm_um_phys_to_kseg0_mips
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#define cpu_mips_kvm_um_phys_to_kseg0 cpu_mips_kvm_um_phys_to_kseg0_mips
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#define cpu_mips_phys_to_kseg0 cpu_mips_phys_to_kseg0_mips
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#define cpu_mips_phys_to_kseg0 cpu_mips_phys_to_kseg0_mips
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#define cpu_mips_realize_env cpu_mips_realize_env_mips
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#define cpu_mips_start_count cpu_mips_start_count_mips
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#define cpu_mips_start_count cpu_mips_start_count_mips
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#define cpu_mips_stop_count cpu_mips_stop_count_mips
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#define cpu_mips_stop_count cpu_mips_stop_count_mips
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#define cpu_mips_store_cause cpu_mips_store_cause_mips
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#define cpu_mips_store_cause cpu_mips_store_cause_mips
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@ -3444,6 +3444,7 @@
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#define cpu_mips_kseg0_to_phys cpu_mips_kseg0_to_phys_mips64
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#define cpu_mips_kseg0_to_phys cpu_mips_kseg0_to_phys_mips64
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#define cpu_mips_kvm_um_phys_to_kseg0 cpu_mips_kvm_um_phys_to_kseg0_mips64
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#define cpu_mips_kvm_um_phys_to_kseg0 cpu_mips_kvm_um_phys_to_kseg0_mips64
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#define cpu_mips_phys_to_kseg0 cpu_mips_phys_to_kseg0_mips64
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#define cpu_mips_phys_to_kseg0 cpu_mips_phys_to_kseg0_mips64
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#define cpu_mips_realize_env cpu_mips_realize_env_mips64
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#define cpu_mips_start_count cpu_mips_start_count_mips64
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#define cpu_mips_start_count cpu_mips_start_count_mips64
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#define cpu_mips_stop_count cpu_mips_stop_count_mips64
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#define cpu_mips_stop_count cpu_mips_stop_count_mips64
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#define cpu_mips_store_cause cpu_mips_store_cause_mips64
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#define cpu_mips_store_cause cpu_mips_store_cause_mips64
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@ -3444,6 +3444,7 @@
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#define cpu_mips_kseg0_to_phys cpu_mips_kseg0_to_phys_mips64el
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#define cpu_mips_kseg0_to_phys cpu_mips_kseg0_to_phys_mips64el
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#define cpu_mips_kvm_um_phys_to_kseg0 cpu_mips_kvm_um_phys_to_kseg0_mips64el
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#define cpu_mips_kvm_um_phys_to_kseg0 cpu_mips_kvm_um_phys_to_kseg0_mips64el
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#define cpu_mips_phys_to_kseg0 cpu_mips_phys_to_kseg0_mips64el
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#define cpu_mips_phys_to_kseg0 cpu_mips_phys_to_kseg0_mips64el
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#define cpu_mips_realize_env cpu_mips_realize_env_mips64el
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#define cpu_mips_start_count cpu_mips_start_count_mips64el
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#define cpu_mips_start_count cpu_mips_start_count_mips64el
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#define cpu_mips_stop_count cpu_mips_stop_count_mips64el
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#define cpu_mips_stop_count cpu_mips_stop_count_mips64el
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#define cpu_mips_store_cause cpu_mips_store_cause_mips64el
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#define cpu_mips_store_cause cpu_mips_store_cause_mips64el
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@ -3444,6 +3444,7 @@
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#define cpu_mips_kseg0_to_phys cpu_mips_kseg0_to_phys_mipsel
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#define cpu_mips_kseg0_to_phys cpu_mips_kseg0_to_phys_mipsel
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#define cpu_mips_kvm_um_phys_to_kseg0 cpu_mips_kvm_um_phys_to_kseg0_mipsel
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#define cpu_mips_kvm_um_phys_to_kseg0 cpu_mips_kvm_um_phys_to_kseg0_mipsel
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#define cpu_mips_phys_to_kseg0 cpu_mips_phys_to_kseg0_mipsel
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#define cpu_mips_phys_to_kseg0 cpu_mips_phys_to_kseg0_mipsel
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#define cpu_mips_realize_env cpu_mips_realize_env_mipsel
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#define cpu_mips_start_count cpu_mips_start_count_mipsel
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#define cpu_mips_start_count cpu_mips_start_count_mipsel
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#define cpu_mips_stop_count cpu_mips_stop_count_mipsel
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#define cpu_mips_stop_count cpu_mips_stop_count_mipsel
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#define cpu_mips_store_cause cpu_mips_store_cause_mipsel
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#define cpu_mips_store_cause cpu_mips_store_cause_mipsel
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@ -132,6 +132,7 @@ void mips_tcg_init(struct uc_struct *uc);
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/* TODO QOM'ify CPU reset and remove */
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/* TODO QOM'ify CPU reset and remove */
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void cpu_state_reset(CPUMIPSState *s);
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void cpu_state_reset(CPUMIPSState *s);
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void cpu_mips_realize_env(CPUMIPSState *env);
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/* cp0_timer.c */
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/* cp0_timer.c */
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uint32_t cpu_mips_get_random(CPUMIPSState *env);
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uint32_t cpu_mips_get_random(CPUMIPSState *env);
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@ -20716,6 +20716,17 @@ void mips_tcg_init(struct uc_struct *uc)
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#include "translate_init.c"
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#include "translate_init.c"
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void cpu_mips_realize_env(CPUMIPSState *env)
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{
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env->exception_base = (int32_t)0xBFC00000;
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#ifndef CONFIG_USER_ONLY
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mmu_init(env, env->cpu_model);
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#endif
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fpu_init(env, env->cpu_model);
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mvp_init(env, env->cpu_model);
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}
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MIPSCPU *cpu_mips_init(struct uc_struct *uc, const char *cpu_model)
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MIPSCPU *cpu_mips_init(struct uc_struct *uc, const char *cpu_model)
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{
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{
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MIPSCPU *cpu;
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MIPSCPU *cpu;
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@ -20728,13 +20739,8 @@ MIPSCPU *cpu_mips_init(struct uc_struct *uc, const char *cpu_model)
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cpu = MIPS_CPU(uc, object_new(uc, TYPE_MIPS_CPU));
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cpu = MIPS_CPU(uc, object_new(uc, TYPE_MIPS_CPU));
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env = &cpu->env;
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env = &cpu->env;
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env->cpu_model = def;
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env->cpu_model = def;
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env->exception_base = (int32_t)0xBFC00000;
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#ifndef CONFIG_USER_ONLY
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cpu_mips_realize_env(env);
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mmu_init(env, def);
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#endif
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fpu_init(env, def);
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mvp_init(env, def);
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object_property_set_bool(uc, OBJECT(cpu), true, "realized", NULL);
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object_property_set_bool(uc, OBJECT(cpu), true, "realized", NULL);
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