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m68k: improve cpu instantiation comments

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Improvement in comments for the instantiation functions.
This is to highlight what each cpu class, in the 68000 series, contains
in terms of instructions/features.

Backports ee2fc6c6da8b2d6f961c8559d62e990c65f67736
This commit is contained in:
Lucien Murray-Pitts 2021-03-12 14:34:12 -05:00 committed by Lioncash
parent 8f391fe579
commit 32e9e17576
2 changed files with 53 additions and 0 deletions
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44
qemu/target/m68k/cpu.c
View file

@ -99,6 +99,7 @@ static void m5206_cpu_initfn(struct uc_struct *uc, Object *obj, void *opaque)
m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
}
/* Base feature set, including isns. for m68k family */
static void m68000_cpu_initfn(struct uc_struct *uc, Object *obj, void *opaque)
{
M68kCPU *cpu = M68K_CPU(uc, obj);
@ -131,6 +132,13 @@ static void m680x0_cpu_common(CPUM68KState *env)
m68k_set_feature(env, M68K_FEATURE_MOVEP);
}
/*
* Adds BFCHG, BFCLR, BFEXTS, BFEXTU, BFFFO, BFINS, BFSET, BFTST, CAS, CAS2,
* CHK2, CMP2, DIVSL, DIVUL, EXTB, PACK, TRAPcc, UNPK.
*
* 68020/30 only:
* CALLM, cpBcc, cpDBcc, cpGEN, cpRESTORE, cpSAVE, cpScc, cpTRAPcc
*/
static void m68020_cpu_initfn(struct uc_struct *uc, Object *obj, void *opaque)
{
M68kCPU *cpu = M68K_CPU(uc, obj);
@ -140,6 +148,14 @@ static void m68020_cpu_initfn(struct uc_struct *uc, Object *obj, void *opaque)
m68k_set_feature(env, M68K_FEATURE_M68020);
}
/*
* Adds: PFLUSH (*5)
* 68030 Only: PFLUSHA (*5), PLOAD (*5), PMOVE
* 68030/40 Only: PTEST
*
* NOTES:
* 5. Not valid on MC68EC030
*/
static void m68030_cpu_initfn(struct uc_struct *uc, Object *obj, void *opaque)
{
M68kCPU *cpu = M68K_CPU(uc, obj);
@ -149,6 +165,23 @@ static void m68030_cpu_initfn(struct uc_struct *uc, Object *obj, void *opaque)
m68k_set_feature(env, M68K_FEATURE_M68030);
}
/*
* Adds: CINV, CPUSH
* Adds all with Note *2: FABS, FSABS, FDABS, FADD, FSADD, FDADD, FBcc, FCMP,
* FDBcc, FDIV, FSDIV, FDDIV, FMOVE, FSMOVE, FDMOVE,
* FMOVEM, FMUL, FSMUL, FDMUL, FNEG, FSNEG, FDNEG, FNOP,
* FRESTORE, FSAVE, FScc, FSQRT, FSSQRT, FDSQRT, FSUB,
* FSSUB, FDSUB, FTRAPcc, FTST
*
* Adds with Notes *2, and *3: FACOS, FASIN, FATAN, FATANH, FCOS, FCOSH, FETOX,
* FETOXM, FGETEXP, FGETMAN, FINT, FINTRZ, FLOG10,
* FLOG2, FLOGN, FLOGNP1, FMOD, FMOVECR, FREM,
* FSCALE, FSGLDIV, FSGLMUL, FSIN, FSINCOS, FSINH,
* FTAN, FTANH, FTENTOX, FTWOTOX
* NOTES:
* 2. Not applicable to the MC68EC040, MC68LC040, MC68EC060, and MC68LC060.
* 3. These are software-supported instructions on the MC68040 and MC68060.
*/
static void m68040_cpu_initfn(struct uc_struct *uc, Object *obj, void *opaque)
{
M68kCPU *cpu = M68K_CPU(uc, obj);
@ -158,6 +191,17 @@ static void m68040_cpu_initfn(struct uc_struct *uc, Object *obj, void *opaque)
m68k_set_feature(env, M68K_FEATURE_M68040);
}
/*
* Adds: PLPA
* Adds all with Note *2: CAS, CAS2, MULS, MULU, CHK2, CMP2, DIVS, DIVU
* All Fxxxx instructions are as per m68040 with exception to; FMOVEM NOTE3
*
* Does NOT implement MOVEP
*
* NOTES:
* 2. Not applicable to the MC68EC040, MC68LC040, MC68EC060, and MC68LC060.
* 3. These are software-supported instructions on the MC68040 and MC68060.
*/
static void m68060_cpu_initfn(struct uc_struct *uc, Object *obj, void *opaque)
{
M68kCPU *cpu = M68K_CPU(uc, obj);

9
qemu/target/m68k/cpu.h
View file

@ -445,6 +445,15 @@ void m68k_switch_sp(CPUM68KState *env);
void do_m68k_semihosting(CPUM68KState *env, int nr);
/*
* The 68000 family is defined in six main CPU classes, the 680[012346]0.
* Generally each successive CPU adds enhanced data/stack/instructions.
* However, some features are only common to one, or a few classes.
* The features covers those subsets of instructons.
*
* CPU32/32+ are basically 680010 compatible with some 68020 class instructons,
* and some additional CPU32 instructions. Mostly Supervisor state differences.
*
* The ColdFire core ISA is a RISC-style reduction of the 68000 series cpu.
* There are 4 ColdFire core ISA revisions: A, A+, B and C.
* Each feature covers the subset of instructions common to the
* ISA revisions mentioned.