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target/m68k: check CF_PARALLEL instead of parallel_cpus

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Thereby decoupling the resulting translated code from the current state
of the system.

Backports commit f0ddf11b23260f0af84fb529486a8f9ba2d19401 from qemu
This commit is contained in:
Emilio G. Cota 2018-03-13 15:13:28 -04:00 committed by Lioncash
parent 5c1dbf456b
commit 3825687e9f
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GPG key ID: 4E3C3CC1031BA9C7
3 changed files with 31 additions and 15 deletions
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1
qemu/target/m68k/helper.h
View file

@ -15,6 +15,7 @@ DEF_HELPER_3(m68k_movec_to, void, env, i32, i32)
DEF_HELPER_2(m68k_movec_from, i32, env, i32)
DEF_HELPER_4(cas2w, void, env, i32, i32, i32)
DEF_HELPER_4(cas2l, void, env, i32, i32, i32)
DEF_HELPER_4(cas2l_parallel, void, env, i32, i32, i32)
#define dh_alias_fp ptr
#define dh_ctype_fp FPReg *

33
qemu/target/m68k/op_helper.c
View file

@ -723,6 +723,7 @@ void HELPER(divsll)(CPUM68KState *env, int numr, int regr, int32_t den)
env->dregs[numr] = quot;
}
/* We're executing in a serial context -- no need to be atomic. */
void HELPER(cas2w)(CPUM68KState *env, uint32_t regs, uint32_t a1, uint32_t a2)
{
uint32_t Dc1 = extract32(regs, 9, 3);
@ -736,17 +737,11 @@ void HELPER(cas2w)(CPUM68KState *env, uint32_t regs, uint32_t a1, uint32_t a2)
int16_t l1, l2;
uintptr_t ra = GETPC();
if (env->uc->parallel_cpus) {
/* Tell the main loop we need to serialize this insn. */
cpu_loop_exit_atomic(ENV_GET_CPU(env), ra);
} else {
/* We're executing in a serial context -- no need to be atomic. */
l1 = cpu_lduw_data_ra(env, a1, ra);
l2 = cpu_lduw_data_ra(env, a2, ra);
if (l1 == c1 && l2 == c2) {
cpu_stw_data_ra(env, a1, u1, ra);
cpu_stw_data_ra(env, a2, u2, ra);
}
l1 = cpu_lduw_data_ra(env, a1, ra);
l2 = cpu_lduw_data_ra(env, a2, ra);
if (l1 == c1 && l2 == c2) {
cpu_stw_data_ra(env, a1, u1, ra);
cpu_stw_data_ra(env, a2, u2, ra);
}
if (c1 != l1) {
@ -761,7 +756,8 @@ void HELPER(cas2w)(CPUM68KState *env, uint32_t regs, uint32_t a1, uint32_t a2)
env->dregs[Dc2] = deposit32(env->dregs[Dc2], 0, 16, l2);
}
void HELPER(cas2l)(CPUM68KState *env, uint32_t regs, uint32_t a1, uint32_t a2)
static void do_cas2l(CPUM68KState *env, uint32_t regs, uint32_t a1, uint32_t a2,
bool parallel)
{
uint32_t Dc1 = extract32(regs, 9, 3);
uint32_t Dc2 = extract32(regs, 6, 3);
@ -778,7 +774,7 @@ void HELPER(cas2l)(CPUM68KState *env, uint32_t regs, uint32_t a1, uint32_t a2)
TCGMemOpIdx oi;
#endif
if (env->uc->parallel_cpus) {
if (parallel) {
/* We're executing in a parallel context -- must be atomic. */
#ifdef CONFIG_ATOMIC64
uint64_t c, u, l;
@ -832,6 +828,17 @@ void HELPER(cas2l)(CPUM68KState *env, uint32_t regs, uint32_t a1, uint32_t a2)
env->dregs[Dc2] = l2;
}
void HELPER(cas2l)(CPUM68KState *env, uint32_t regs, uint32_t a1, uint32_t a2)
{
do_cas2l(env, regs, a1, a2, false);
}
void HELPER(cas2l_parallel)(CPUM68KState *env, uint32_t regs, uint32_t a1,
uint32_t a2)
{
do_cas2l(env, regs, a1, a2, true);
}
struct bf_data {
uint32_t addr;
uint32_t bofs;

12
qemu/target/m68k/translate.c
View file

@ -2527,7 +2527,11 @@ DISAS_INSN(cas2w)
(REG(ext1, 6) << 3) |
(REG(ext2, 0) << 6) |
(REG(ext1, 0) << 9));
gen_helper_cas2w(tcg_ctx, tcg_ctx->cpu_env, regs, addr1, addr2);
if (tb_cflags(s->tb) & CF_PARALLEL) {
gen_helper_exit_atomic(tcg_ctx, tcg_ctx->cpu_env);
} else {
gen_helper_cas2w(tcg_ctx, tcg_ctx->cpu_env, regs, addr1, addr2);
}
tcg_temp_free(tcg_ctx, regs);
/* Note that cas2w also assigned to env->cc_op. */
@ -2574,7 +2578,11 @@ DISAS_INSN(cas2l)
(REG(ext1, 6) << 3) |
(REG(ext2, 0) << 6) |
(REG(ext1, 0) << 9));
gen_helper_cas2l(tcg_ctx, tcg_ctx->cpu_env, regs, addr1, addr2);
if (tb_cflags(s->tb) & CF_PARALLEL) {
gen_helper_cas2l_parallel(tcg_ctx, tcg_ctx->cpu_env, regs, addr1, addr2);
} else {
gen_helper_cas2l(tcg_ctx, tcg_ctx->cpu_env, regs, addr1, addr2);
}
tcg_temp_free(tcg_ctx, regs);
/* Note that cas2l also assigned to env->cc_op. */