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target/arm: Minor cleanup for ARMv6-M 32-bit instructions

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The arrays were made static, "if" was simplified because V7M and V8M
define V6 feature.

Backports commit 8297cb13e407db8a96cc7ed6b6a6c318a150759a from qemu
This commit is contained in:
Julia Suvorova 2018-06-29 13:50:15 -05:00 committed by Lioncash
parent 22c3206738
commit 38747fc125
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 13 additions and 14 deletions
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27
qemu/target/arm/translate.c
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@ -10266,18 +10266,18 @@ static void disas_thumb2_insn(DisasContext *s, uint32_t insn)
!arm_dc_feature(s, ARM_FEATURE_V7)) { !arm_dc_feature(s, ARM_FEATURE_V7)) {
int i; int i;
bool found = false; bool found = false;
const uint32_t armv6m_insn[] = {0xf3808000 /* msr */, static const uint32_t armv6m_insn[] = {0xf3808000 /* msr */,
0xf3b08040 /* dsb */, 0xf3b08040 /* dsb */,
0xf3b08050 /* dmb */, 0xf3b08050 /* dmb */,
0xf3b08060 /* isb */, 0xf3b08060 /* isb */,
0xf3e08000 /* mrs */, 0xf3e08000 /* mrs */,
0xf000d000 /* bl */}; 0xf000d000 /* bl */};
const uint32_t armv6m_mask[] = {0xffe0d000, static const uint32_t armv6m_mask[] = {0xffe0d000,
0xfff0d0f0, 0xfff0d0f0,
0xfff0d0f0, 0xfff0d0f0,
0xfff0d0f0, 0xfff0d0f0,
0xffe0d000, 0xffe0d000,
0xf800d000}; 0xf800d000};
for (i = 0; i < ARRAY_SIZE(armv6m_insn); i++) { for (i = 0; i < ARRAY_SIZE(armv6m_insn); i++) {
if ((insn & armv6m_mask[i]) == armv6m_insn[i]) { if ((insn & armv6m_mask[i]) == armv6m_insn[i]) {
@ -11210,8 +11210,7 @@ static void disas_thumb2_insn(DisasContext *s, uint32_t insn)
break; break;
case 3: /* Special control operations. */ case 3: /* Special control operations. */
if (!arm_dc_feature(s, ARM_FEATURE_V7) && if (!arm_dc_feature(s, ARM_FEATURE_V7) &&
!(arm_dc_feature(s, ARM_FEATURE_V6) && !arm_dc_feature(s, ARM_FEATURE_M)) {
arm_dc_feature(s, ARM_FEATURE_M))) {
goto illegal_op; goto illegal_op;
} }
op = (insn >> 4) & 0xf; op = (insn >> 4) & 0xf;