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target/mips: Clean up handling of CP0 register 7

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Clean up handling of CP0 register 7.

Backports commit 143a9875e51a358924154ffa76135ca29415dfb5 from qemu
This commit is contained in:
Aleksandar Markovic 2019-11-18 22:55:21 -05:00 committed by Lioncash
parent 95fa7aae61
commit 38f0e31950
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 4 additions and 4 deletions
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8
qemu/target/mips/translate.c
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@ -7168,7 +7168,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case CP0_REGISTER_07:
switch (sel) {
case 0:
case CP0_REG07__HWRENA:
check_insn(ctx, ISA_MIPS32R2);
gen_mfc0_load32(ctx, arg, offsetof(CPUMIPSState, CP0_HWREna));
register_name = "HWREna";
@ -7898,7 +7898,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case CP0_REGISTER_07:
switch (sel) {
case 0:
case CP0_REG07__HWRENA:
check_insn(ctx, ISA_MIPS32R2);
gen_helper_mtc0_hwrena(tcg_ctx, tcg_ctx->cpu_env, arg);
ctx->base.is_jmp = DISAS_STOP;
@ -8638,7 +8638,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case CP0_REGISTER_07:
switch (sel) {
case 0:
case CP0_REG07__HWRENA:
check_insn(ctx, ISA_MIPS32R2);
gen_mfc0_load32(ctx, arg, offsetof(CPUMIPSState, CP0_HWREna));
register_name = "HWREna";
@ -9350,7 +9350,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case CP0_REGISTER_07:
switch (sel) {
case 0:
case CP0_REG07__HWRENA:
check_insn(ctx, ISA_MIPS32R2);
gen_helper_mtc0_hwrena(tcg_ctx, tcg_ctx->cpu_env, arg);
ctx->base.is_jmp = DISAS_STOP;