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target/mips: Support R5900 three-operand MULT1 and MULTU1 instructions

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Add support for MULT1 and MULTU1 instructions.

Backports commit 06de726b2d4da185dfec9d06b5f1032059ad3554 from qemu
This commit is contained in:
Fredrik Noring 2018-11-10 12:03:20 -05:00 committed by Lioncash
parent 91cd7c20e5
commit 3914d65fb9
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 22 additions and 4 deletions
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26
qemu/target/mips/translate.c
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@ -4831,7 +4831,7 @@ static void gen_muldiv(DisasContext *ctx, uint32_t opc,
* Toshiba/Sony R5900 and the Toshiba TX19, TX39 and TX79 core
* architectures are special three-operand variants with the syntax
*
* MULT[U] rd, rs, rt
* MULT[U][1] rd, rs, rt
*
* such that
*
@ -4856,6 +4856,9 @@ static void gen_mul_txx9(DisasContext *ctx, uint32_t opc,
gen_load_gpr(ctx, t1, rt);
switch (opc) {
case TX79_MMI_MULT1:
acc = 1;
/* Fall through */
case OPC_MULT:
{
TCGv_i32 t2 = tcg_temp_new_i32(tcg_ctx);
@ -4872,6 +4875,9 @@ static void gen_mul_txx9(DisasContext *ctx, uint32_t opc,
tcg_temp_free_i32(tcg_ctx, t3);
}
break;
case TX79_MMI_MULTU1:
acc = 1;
/* Fall through */
case OPC_MULTU:
{
TCGv_i32 t2 = tcg_temp_new_i32(tcg_ctx);
@ -24782,6 +24788,9 @@ static void decode_tx79_mmi3(CPUMIPSState *env, DisasContext *ctx)
static void decode_tx79_mmi(CPUMIPSState *env, DisasContext *ctx)
{
uint32_t opc = MASK_TX79_MMI(ctx->opcode);
int rs = extract32(ctx->opcode, 21, 5);
int rt = extract32(ctx->opcode, 16, 5);
int rd = extract32(ctx->opcode, 11, 5);
switch (opc) {
case TX79_MMI_CLASS_MMI0:
@ -24793,6 +24802,13 @@ static void decode_tx79_mmi(CPUMIPSState *env, DisasContext *ctx)
case TX79_MMI_CLASS_MMI2:
decode_tx79_mmi2(env, ctx);
break;
case TX79_MMI_CLASS_MMI3:
decode_tx79_mmi3(env, ctx);
break;
case TX79_MMI_MULT1:
case TX79_MMI_MULTU1:
gen_mul_txx9(ctx, opc, rd, rs, rt);
break;
case TX79_MMI_MADD: /* TODO: TX79_MMI_MADD */
case TX79_MMI_MADDU: /* TODO: TX79_MMI_MADDU */
case TX79_MMI_PLZCW: /* TODO: TX79_MMI_PLZCW */
@ -24800,8 +24816,6 @@ static void decode_tx79_mmi(CPUMIPSState *env, DisasContext *ctx)
case TX79_MMI_MTHI1: /* TODO: TX79_MMI_MTHI1 */
case TX79_MMI_MFLO1: /* TODO: TX79_MMI_MFLO1 */
case TX79_MMI_MTLO1: /* TODO: TX79_MMI_MTLO1 */
case TX79_MMI_MULT1: /* TODO: TX79_MMI_MULT1 */
case TX79_MMI_MULTU1: /* TODO: TX79_MMI_MULTU1 */
case TX79_MMI_DIV1: /* TODO: TX79_MMI_DIV1 */
case TX79_MMI_DIVU1: /* TODO: TX79_MMI_DIVU1 */
case TX79_MMI_MADD1: /* TODO: TX79_MMI_MADD1 */
@ -26212,7 +26226,11 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx, bool *insn_need_pat
}
break;
case OPC_SPECIAL3:
decode_opc_special3(env, ctx);
if (ctx->insn_flags & INSN_R5900) {
decode_tx79_sq(env, ctx); /* TX79_SQ */
} else {
decode_opc_special3(env, ctx);
}
break;
case OPC_REGIMM:
op1 = MASK_REGIMM(ctx->opcode);