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util/cacheinfo: Use uint64_t on LLP64 model to satisfy Windows ARM64

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Windows ARM64 uses LLP64 model, which breaks current assumptions.

Backports commit 8041336ef74e19ca607c1601016333c986de8f9c from qemu
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Cao Jiaxi 2019-05-09 17:43:18 -04:00 committed by Lioncash
parent a71c027063
commit 3922118434
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 1 additions and 1 deletions
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qemu/util/cacheinfo.c
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@ -101,7 +101,7 @@ static void sys_cache_info(int *isize, int *dsize)
static void arch_cache_info(int *isize, int *dsize) static void arch_cache_info(int *isize, int *dsize)
{ {
if (*isize == 0 || *dsize == 0) { if (*isize == 0 || *dsize == 0) {
unsigned long ctr; uint64_t ctr;
/* The real cache geometry is in CCSIDR_EL1/CLIDR_EL1/CSSELR_EL1, /* The real cache geometry is in CCSIDR_EL1/CLIDR_EL1/CSSELR_EL1,
but (at least under Linux) these are marked protected by the but (at least under Linux) these are marked protected by the