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target/riscv: Report errors validating 2nd-stage PTEs

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Backports commit 88914473e748db20d8e18b9735f647a683319fa6 from qemu
This commit is contained in:
Alistair Francis 2021-02-25 11:55:51 -05:00 committed by Lioncash
parent a6c323c912
commit 39ff690eff
1 changed files with 7 additions and 2 deletions
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9
qemu/target/riscv/cpu_helper.c
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@ -429,8 +429,13 @@ restart:
hwaddr vbase; hwaddr vbase;
/* Do the second stage translation on the base PTE address. */ /* Do the second stage translation on the base PTE address. */
get_physical_address(env, &vbase, &vbase_prot, base, MMU_DATA_LOAD, int vbase_ret = get_physical_address(env, &vbase, &vbase_prot,
mmu_idx, false, true); base, MMU_DATA_LOAD,
mmu_idx, false, true);
if (vbase_ret != TRANSLATE_SUCCESS) {
return vbase_ret;
}
pte_addr = vbase + idx * ptesize; pte_addr = vbase + idx * ptesize;
} else { } else {