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target/arm: Use tcg_gen_gvec_mov for clear_vec_high

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The 8-byte store for the end a !is_q operation can be
merged with the other stores. Use a no-op vector move
to trigger the expand_clr portion of tcg_gen_gvec_mov.

Backports commit 5c27392dd08bd8534893abf25ef501f1bd8680fe from qemu
This commit is contained in:
Richard Henderson 2020-06-14 21:00:50 -04:00 committed by Lioncash
parent 22004b8106
commit 3ac9b9b206
1 changed files with 2 additions and 8 deletions
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10
qemu/target/arm/translate-a64.c
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@ -649,14 +649,8 @@ static void clear_vec_high(DisasContext *s, bool is_q, int rd)
unsigned ofs = fp_reg_offset(s, rd, MO_64);
unsigned vsz = vec_full_reg_size(s);
if (!is_q) {
TCGv_i64 tcg_zero = tcg_const_i64(tcg_ctx, 0);
tcg_gen_st_i64(tcg_ctx, tcg_zero, tcg_ctx->cpu_env, ofs + 8);
tcg_temp_free_i64(tcg_ctx, tcg_zero);
}
if (vsz > 16) {
tcg_gen_gvec_dup_imm(tcg_ctx, MO_64, ofs + 16, vsz - 16, vsz - 16, 0);
}
/* Nop move, with side effect of clearing the tail. */
tcg_gen_gvec_mov(tcg_ctx, MO_64, ofs, ofs, is_q ? 16 : 8, vsz);
}
void write_fp_dreg(DisasContext *s, int reg, TCGv_i64 v)