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https://github.com/yuzu-emu/unicorn.git
synced 2024-12-24 01:15:28 +00:00
tcg/i386: Assume 32-bit values are zero-extended
We now have an invariant that all TCG_TYPE_I32 values are zero-extended, which means that we do not need to extend them again during qemu_ld/st, either explicitly via a separate tcg_out_ext32u or implicitly via P_ADDR32. Backports commit 4810d96f03be4d3820563e3c6bf13dfc0627f205 from qemu
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@ -316,13 +316,11 @@ static inline int tcg_target_const_match(tcg_target_long val, TCGType type,
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#define P_EXT38 0x200 /* 0x0f 0x38 opcode prefix */
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#define P_EXT38 0x200 /* 0x0f 0x38 opcode prefix */
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#define P_DATA16 0x400 /* 0x66 opcode prefix */
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#define P_DATA16 0x400 /* 0x66 opcode prefix */
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#if TCG_TARGET_REG_BITS == 64
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#if TCG_TARGET_REG_BITS == 64
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# define P_ADDR32 0x800 /* 0x67 opcode prefix */
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# define P_REXW 0x1000 /* Set REX.W = 1 */
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# define P_REXW 0x1000 /* Set REX.W = 1 */
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# define P_REXB_R 0x2000 /* REG field as byte register */
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# define P_REXB_R 0x2000 /* REG field as byte register */
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# define P_REXB_RM 0x4000 /* R/M field as byte register */
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# define P_REXB_RM 0x4000 /* R/M field as byte register */
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# define P_GS 0x8000 /* gs segment override */
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# define P_GS 0x8000 /* gs segment override */
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#else
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#else
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# define P_ADDR32 0
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# define P_REXW 0
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# define P_REXW 0
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# define P_REXB_R 0
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# define P_REXB_R 0
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# define P_REXB_RM 0
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# define P_REXB_RM 0
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@ -554,9 +552,6 @@ static void tcg_out_opc(TCGContext *s, int opc, int r, int rm, int x)
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tcg_debug_assert((opc & P_REXW) == 0);
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tcg_debug_assert((opc & P_REXW) == 0);
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tcg_out8(s, 0x66);
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tcg_out8(s, 0x66);
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}
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}
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if (opc & P_ADDR32) {
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tcg_out8(s, 0x67);
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}
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if (opc & P_SIMDF3) {
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if (opc & P_SIMDF3) {
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tcg_out8(s, 0xf3);
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tcg_out8(s, 0xf3);
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} else if (opc & P_SIMDF2) {
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} else if (opc & P_SIMDF2) {
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@ -1761,11 +1756,7 @@ static inline void tcg_out_tlb_load(TCGContext *s, TCGReg addrlo, TCGReg addrhi,
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tcg_out_modrm_offset(s, OPC_CMP_GvEv + trexw, r1, r0, 0);
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tcg_out_modrm_offset(s, OPC_CMP_GvEv + trexw, r1, r0, 0);
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/* Prepare for both the fast path add of the tlb addend, and the slow
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/* Prepare for both the fast path add of the tlb addend, and the slow
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path function argument setup. There are two cases worth note:
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path function argument setup. */
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For 32-bit guest and x86_64 host, MOVL zero-extends the guest address
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before the fastpath ADDQ below. For 64-bit guest and x32 host, MOVQ
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copies the entire guest address for the slow path, while truncation
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for the 32-bit host happens with the fastpath ADDL below. */
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tcg_out_mov(s, ttype, r1, addrlo);
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tcg_out_mov(s, ttype, r1, addrlo);
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// Unicorn: fast path if hookmem is not enable
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// Unicorn: fast path if hookmem is not enable
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@ -2125,41 +2116,31 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64)
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#else
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#else
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{
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{
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int32_t offset = GUEST_BASE;
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int32_t offset = GUEST_BASE;
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TCGReg base = addrlo;
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int index = -1;
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int index = -1;
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int seg = 0;
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int seg = 0;
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/* For a 32-bit guest, the high 32 bits may contain garbage.
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/*
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We can do this with the ADDR32 prefix if we're not using
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* Recall we store 32-bit values zero-extended. No need for
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a guest base, or when using segmentation. Otherwise we
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* further manual extension or an addr32 (0x67) prefix.
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need to zero-extend manually. */
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*/
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if (GUEST_BASE == 0 || guest_base_flags) {
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if (GUEST_BASE == 0 || guest_base_flags) {
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seg = s->guest_base_flags;
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seg = s->guest_base_flags;
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offset = 0;
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offset = 0;
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if (TCG_TARGET_REG_BITS > TARGET_LONG_BITS) {
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} else if (TCG_TARGET_REG_BITS == 64 && offset != guest_base) {
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seg |= P_ADDR32;
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tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_L1, guest_base);
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}
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index = TCG_REG_L1;
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} else if (TCG_TARGET_REG_BITS == 64) {
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offset = 0;
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if (TARGET_LONG_BITS == 32) {
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tcg_out_ext32u(s, TCG_REG_L0, base);
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base = TCG_REG_L0;
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}
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if (offset != GUEST_BASE) {
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tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_L1, GUEST_BASE);
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index = TCG_REG_L1;
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offset = 0;
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}
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}
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}
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tcg_out_qemu_ld_direct(s, datalo, datahi,
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tcg_out_qemu_ld_direct(s, datalo, datahi,
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base, index, offset, seg, is64, opc);
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addrlo, index, offset, seg, is64, opc);
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}
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}
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#endif
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#endif
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}
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}
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static void tcg_out_qemu_st_direct(TCGContext *s, TCGReg datalo, TCGReg datahi,
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static void tcg_out_qemu_st_direct(TCGContext *s, TCGReg datalo, TCGReg datahi,
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TCGReg base, intptr_t ofs, int seg,
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TCGReg base, int index, intptr_t ofs,
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TCGMemOp memop)
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int seg, TCGMemOp memop)
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{
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{
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/* ??? Ideally we wouldn't need a scratch register. For user-only,
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/* ??? Ideally we wouldn't need a scratch register. For user-only,
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we could perform the bswap twice to restore the original value
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we could perform the bswap twice to restore the original value
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@ -2183,8 +2164,8 @@ static void tcg_out_qemu_st_direct(TCGContext *s, TCGReg datalo, TCGReg datahi,
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tcg_out_mov(s, TCG_TYPE_I32, scratch, datalo);
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tcg_out_mov(s, TCG_TYPE_I32, scratch, datalo);
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datalo = scratch;
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datalo = scratch;
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}
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}
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tcg_out_modrm_offset(s, OPC_MOVB_EvGv + P_REXB_R + seg,
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tcg_out_modrm_sib_offset(s, OPC_MOVB_EvGv + P_REXB_R + seg,
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datalo, base, ofs);
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datalo, base, index, 0, ofs);
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break;
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break;
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case MO_16:
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case MO_16:
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if (bswap) {
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if (bswap) {
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@ -2192,7 +2173,8 @@ static void tcg_out_qemu_st_direct(TCGContext *s, TCGReg datalo, TCGReg datahi,
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tcg_out_rolw_8(s, scratch);
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tcg_out_rolw_8(s, scratch);
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datalo = scratch;
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datalo = scratch;
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}
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}
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tcg_out_modrm_offset(s, movop + P_DATA16 + seg, datalo, base, ofs);
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tcg_out_modrm_sib_offset(s, movop + P_DATA16 + seg, datalo,
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base, index, 0, ofs);
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break;
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break;
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case MO_32:
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case MO_32:
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if (bswap) {
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if (bswap) {
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@ -2200,7 +2182,7 @@ static void tcg_out_qemu_st_direct(TCGContext *s, TCGReg datalo, TCGReg datahi,
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tcg_out_bswap32(s, scratch);
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tcg_out_bswap32(s, scratch);
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datalo = scratch;
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datalo = scratch;
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}
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}
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tcg_out_modrm_offset(s, movop + seg, datalo, base, ofs);
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tcg_out_modrm_sib_offset(s, movop + seg, datalo, base, index, 0, ofs);
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break;
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break;
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case MO_64:
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case MO_64:
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if (TCG_TARGET_REG_BITS == 64) {
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if (TCG_TARGET_REG_BITS == 64) {
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@ -2209,22 +2191,27 @@ static void tcg_out_qemu_st_direct(TCGContext *s, TCGReg datalo, TCGReg datahi,
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tcg_out_bswap64(s, scratch);
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tcg_out_bswap64(s, scratch);
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datalo = scratch;
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datalo = scratch;
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}
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}
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tcg_out_modrm_offset(s, movop + P_REXW + seg, datalo, base, ofs);
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tcg_out_modrm_sib_offset(s, movop + P_REXW + seg, datalo,
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base, index, 0, ofs);
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} else if (bswap) {
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} else if (bswap) {
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tcg_out_mov(s, TCG_TYPE_I32, scratch, datahi);
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tcg_out_mov(s, TCG_TYPE_I32, scratch, datahi);
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tcg_out_bswap32(s, scratch);
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tcg_out_bswap32(s, scratch);
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tcg_out_modrm_offset(s, OPC_MOVL_EvGv + seg, scratch, base, ofs);
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tcg_out_modrm_sib_offset(s, OPC_MOVL_EvGv + seg, scratch,
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base, index, 0, ofs);
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tcg_out_mov(s, TCG_TYPE_I32, scratch, datalo);
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tcg_out_mov(s, TCG_TYPE_I32, scratch, datalo);
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tcg_out_bswap32(s, scratch);
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tcg_out_bswap32(s, scratch);
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tcg_out_modrm_offset(s, OPC_MOVL_EvGv + seg, scratch, base, ofs+4);
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tcg_out_modrm_sib_offset(s, OPC_MOVL_EvGv + seg, scratch,
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base, index, 0, ofs + 4);
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} else {
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} else {
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if (real_bswap) {
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if (real_bswap) {
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int t = datalo;
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int t = datalo;
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datalo = datahi;
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datalo = datahi;
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datahi = t;
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datahi = t;
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}
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}
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tcg_out_modrm_offset(s, movop + seg, datalo, base, ofs);
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tcg_out_modrm_sib_offset(s, movop + seg, datalo,
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tcg_out_modrm_offset(s, movop + seg, datahi, base, ofs+4);
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base, index, 0, ofs);
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tcg_out_modrm_sib_offset(s, movop + seg, datahi,
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base, index, 0, ofs + 4);
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}
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}
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break;
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break;
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default:
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default:
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@ -2257,7 +2244,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64)
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label_ptr, offsetof(CPUTLBEntry, addr_write));
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label_ptr, offsetof(CPUTLBEntry, addr_write));
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/* TLB Hit. */
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/* TLB Hit. */
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tcg_out_qemu_st_direct(s, datalo, datahi, TCG_REG_L1, 0, 0, opc);
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tcg_out_qemu_st_direct(s, datalo, datahi, TCG_REG_L1, -1, 0, 0, opc);
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/* Record the current context of a store into ldst label */
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/* Record the current context of a store into ldst label */
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add_qemu_ldst_label(s, false, is64, oi, datalo, datahi, addrlo, addrhi,
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add_qemu_ldst_label(s, false, is64, oi, datalo, datahi, addrlo, addrhi,
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@ -2265,35 +2252,25 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64)
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#else
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#else
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{
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{
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int32_t offset = GUEST_BASE;
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int32_t offset = GUEST_BASE;
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TCGReg base = addrlo;
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int index = -1;
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int seg = 0;
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int seg = 0;
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/* See comment in tcg_out_qemu_ld re zero-extension of addrlo. */
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/*
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* Recall we store 32-bit values zero-extended. No need for
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* further manual extension or an addr32 (0x67) prefix.
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*/
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if (GUEST_BASE == 0 || guest_base_flags) {
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if (GUEST_BASE == 0 || guest_base_flags) {
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seg = s->guest_base_flags;
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seg = s->guest_base_flags;
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offset = 0;
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offset = 0;
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if (TCG_TARGET_REG_BITS > TARGET_LONG_BITS) {
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} else if (TCG_TARGET_REG_BITS == 64 && offset != guest_base) {
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seg |= P_ADDR32;
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/* ??? Note that we require L0 free for bswap. */
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}
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tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_L1, guest_base);
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} else if (TCG_TARGET_REG_BITS == 64) {
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index = TCG_REG_L1;
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/* ??? Note that we can't use the same SIB addressing scheme
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offset = 0;
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as for loads, since we require L0 free for bswap. */
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if (offset != GUEST_BASE) {
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if (TARGET_LONG_BITS == 32) {
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tcg_out_ext32u(s, TCG_REG_L0, base);
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base = TCG_REG_L0;
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}
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tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_L1, GUEST_BASE);
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tgen_arithr(s, ARITH_ADD + P_REXW, TCG_REG_L1, base);
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base = TCG_REG_L1;
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offset = 0;
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} else if (TARGET_LONG_BITS == 32) {
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tcg_out_ext32u(s, TCG_REG_L1, base);
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base = TCG_REG_L1;
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}
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}
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}
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tcg_out_qemu_st_direct(s, datalo, datahi, base, offset, seg, opc);
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tcg_out_qemu_st_direct(s, datalo, datahi,
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addrlo, index, offset, seg, opc);
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}
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}
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#endif
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#endif
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}
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}
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