yuzu/unicorn
1
0
Fork 0
mirror of https://github.com/yuzu-emu/unicorn.git synced 2024-12-23 14:45:48 +00:00
Code Issues Packages Projects Releases Wiki Activity

target/m68k: Switch to transaction_failed hook

Browse source 
Switch the m68k target from the old unassigned_access hook
to the transaction_failed hook.

The notable difference is that rather than it being called
for all physical memory accesses which fail (including
those made by DMA devices or by the gdbstub), it is only
called for those made by the CPU via its MMU. (In previous
commits we put in explicit checks for the direct physical
loads made by the target/m68k code which will no longer
be handled by calling the unassigned_access hook.)

Backports commit e1aaf3a88e95ab007445281e2b2f6e3c8da47f22 from qemu
This commit is contained in:
Peter Maydell 2019-05-17 12:01:38 -04:00 committed by Lioncash
parent ab63f1a102
commit 3fb64fd5a2
No known key found for this signature in database
GPG key ID: 4E3C3CC1031BA9C7
3 changed files with 13 additions and 16 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
qemu/target/m68k/cpu.c
View file

@ -253,7 +253,7 @@ static void m68k_cpu_class_init(struct uc_struct *uc, ObjectClass *c, void *data
cc->set_pc = m68k_cpu_set_pc;
cc->tlb_fill = m68k_cpu_tlb_fill;
#if defined(CONFIG_SOFTMMU)
cc->do_unassigned_access = m68k_cpu_unassigned_access;
cc->do_transaction_failed = m68k_cpu_transaction_failed;
cc->get_phys_page_debug = m68k_cpu_get_phys_page_debug;
#endif
cc->tcg_initialize = m68k_tcg_init;

7
qemu/target/m68k/cpu.h
View file

@ -540,9 +540,10 @@ static inline int cpu_mmu_index (CPUM68KState *env, bool ifetch)
bool m68k_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr);
void m68k_cpu_unassigned_access(CPUState *cs, hwaddr addr,
bool is_write, bool is_exec, int is_asi,
unsigned size);
void m68k_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
unsigned size, MMUAccessType access_type,
int mmu_idx, MemTxAttrs attrs,
MemTxResult response, uintptr_t retaddr);
#include "exec/cpu-all.h"

20
qemu/target/m68k/op_helper.c
View file

@ -446,19 +446,15 @@ static inline void do_interrupt_m68k_hardirq(CPUM68KState *env)
do_interrupt_all(env, 1);
}
void m68k_cpu_unassigned_access(CPUState *cs, hwaddr addr, bool is_write,
bool is_exec, int is_asi, unsigned size)
void m68k_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
unsigned size, MMUAccessType access_type,
int mmu_idx, MemTxAttrs attrs,
MemTxResult response, uintptr_t retaddr)
{
M68kCPU *cpu = M68K_CPU(cs->uc, cs);
CPUM68KState *env = &cpu->env;
#ifdef DEBUG_UNASSIGNED
qemu_log_mask(CPU_LOG_INT, "Unassigned " TARGET_FMT_plx " wr=%d exe=%d\n",
addr, is_write, is_exec);
#endif
if (env == NULL) {
/* when called from gdb, env is NULL */
return;
}
cpu_restore_state(cs, retaddr, true);
if (m68k_feature(env, M68K_FEATURE_M68040)) {
env->mmu.mmusr = 0;
@ -468,7 +464,7 @@ void m68k_cpu_unassigned_access(CPUState *cs, hwaddr addr, bool is_write,
if (env->sr & SR_S) { /* SUPERVISOR */
env->mmu.ssw |= M68K_TM_040_SUPER;
}
if (is_exec) { /* instruction or data */
if (access_type == MMU_INST_FETCH) { /* instruction or data */
env->mmu.ssw |= M68K_TM_040_CODE;
} else {
env->mmu.ssw |= M68K_TM_040_DATA;
@ -486,7 +482,7 @@ void m68k_cpu_unassigned_access(CPUState *cs, hwaddr addr, bool is_write,
break;
}
if (!is_write) {
if (access_type != MMU_DATA_STORE) {
env->mmu.ssw |= M68K_RW_040;
}