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target/mips: Clean up handling of CP0 register 14
Clean up handling of CP0 register 14. Backports commit 35e4b54d90b07736d24d736c50f236231cde929f from qemu
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@ -360,6 +360,7 @@ typedef struct mips_def_t mips_def_t;
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#define CP0_REG13__NESTEDEXC 5
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/* CP0 Register 14 */
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#define CP0_REG14__EPC 0
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#define CP0_REG14__NESTEDEPC 2
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/* CP0 Register 15 */
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#define CP0_REG15__PRID 0
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#define CP0_REG15__EBASE 1
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@ -7291,7 +7291,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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break;
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case CP0_REGISTER_14:
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switch (sel) {
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case 0:
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case CP0_REG14__EPC:
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tcg_gen_ld_tl(tcg_ctx, arg, tcg_ctx->cpu_env, offsetof(CPUMIPSState, CP0_EPC));
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tcg_gen_ext32s_tl(tcg_ctx, arg, arg);
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register_name = "EPC";
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@ -8026,7 +8026,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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break;
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case CP0_REGISTER_14:
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switch (sel) {
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case 0:
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case CP0_REG14__EPC:
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tcg_gen_st_tl(tcg_ctx, arg, tcg_ctx->cpu_env, offsetof(CPUMIPSState, CP0_EPC));
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register_name = "EPC";
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break;
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@ -8763,7 +8763,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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break;
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case CP0_REGISTER_14:
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switch (sel) {
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case 0:
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case CP0_REG14__EPC:
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tcg_gen_ld_tl(tcg_ctx, arg, tcg_ctx->cpu_env, offsetof(CPUMIPSState, CP0_EPC));
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register_name = "EPC";
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break;
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@ -9482,7 +9482,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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break;
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case CP0_REGISTER_14:
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switch (sel) {
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case 0:
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case CP0_REG14__EPC:
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tcg_gen_st_tl(tcg_ctx, arg, tcg_ctx->cpu_env, offsetof(CPUMIPSState, CP0_EPC));
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register_name = "EPC";
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break;
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