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tcg/mips: Fix type of tcg_target_reg_alloc_order[]

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The MIPS TCG backend is the only one to have
tcg_target_reg_alloc_order[] elements of type TCGReg rather than int.
This resulted in commit 91478cefaaf2 ("tcg: Allocate indirect_base
temporaries in a different order") breaking the build on MIPS since the
type differed from indirect_reg_alloc_order[]:

tcg/tcg.c:1725:44: error: pointer type mismatch in conditional expression [-Werror]
order = rev ? indirect_reg_alloc_order : tcg_target_reg_alloc_order;
^

Make it an array of ints to fix the build and match other architectures.

Backports commit 2dc7553d0c0a3915c649e1a91b0f0be70b4674b3 from qemu
This commit is contained in:
James Hogan 2018-02-23 13:21:30 -05:00 committed by Lioncash
parent 88af0b0153
commit 41c6079823
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1 changed files with 1 additions and 1 deletions
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2
qemu/tcg/mips/tcg-target.inc.c
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@ -76,7 +76,7 @@ static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
#define TCG_TMP1 TCG_REG_T9
/* check if we really need so many registers :P */
static const TCGReg tcg_target_reg_alloc_order[] = {
static const int tcg_target_reg_alloc_order[] = {
/* Call saved registers. */
TCG_REG_S0,
TCG_REG_S1,