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target-mips: move group of functions above gen_load_fpr32()
Move the "Tests" group of functions so that gen_load_fpr32() and gen_store_fpr32() can use generate_exception(). Backports commit eab9944c7801525737626fa45cddaf00932dd2c8 from qemu
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91503663e2
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@ -1547,6 +1547,64 @@ static inline void gen_store_srsgpr (DisasContext *s, int from, int to)
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}
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}
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/* Tests */
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static inline void gen_save_pc(target_ulong pc)
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{
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tcg_gen_movi_tl(cpu_PC, pc);
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}
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static inline void save_cpu_state(DisasContext *ctx, int do_save_pc)
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{
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LOG_DISAS("hflags %08x saved %08x\n", ctx->hflags, ctx->saved_hflags);
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if (do_save_pc && ctx->pc != ctx->saved_pc) {
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gen_save_pc(ctx->pc);
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ctx->saved_pc = ctx->pc;
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}
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if (ctx->hflags != ctx->saved_hflags) {
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tcg_gen_movi_i32(hflags, ctx->hflags);
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ctx->saved_hflags = ctx->hflags;
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switch (ctx->hflags & MIPS_HFLAG_BMASK_BASE) {
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case MIPS_HFLAG_BR:
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break;
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case MIPS_HFLAG_BC:
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case MIPS_HFLAG_BL:
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case MIPS_HFLAG_B:
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tcg_gen_movi_tl(btarget, ctx->btarget);
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break;
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}
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}
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}
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static inline void restore_cpu_state(CPUMIPSState *env, DisasContext *ctx)
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{
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ctx->saved_hflags = ctx->hflags;
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switch (ctx->hflags & MIPS_HFLAG_BMASK_BASE) {
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case MIPS_HFLAG_BR:
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break;
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case MIPS_HFLAG_BC:
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case MIPS_HFLAG_BL:
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case MIPS_HFLAG_B:
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ctx->btarget = env->btarget;
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break;
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}
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}
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static inline void generate_exception_err(DisasContext *ctx, int excp, int err)
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{
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TCGv_i32 texcp = tcg_const_i32(excp);
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TCGv_i32 terr = tcg_const_i32(err);
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save_cpu_state(ctx, 1);
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gen_helper_raise_exception_err(cpu_env, texcp, terr);
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tcg_temp_free_i32(terr);
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tcg_temp_free_i32(texcp);
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}
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static inline void generate_exception(DisasContext *ctx, int excp)
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{
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save_cpu_state(ctx, 1);
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gen_helper_0e0i(raise_exception, excp);
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}
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/* Floating point register moves. */
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static void gen_load_fpr32(DisasContext *s, TCGv_i32 t, int reg)
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{
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@ -1622,70 +1680,6 @@ static inline int get_fp_bit (int cc)
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return 23;
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}
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/* Tests */
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static inline void gen_save_pc(DisasContext *ctx, target_ulong pc)
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{
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TCGContext *tcg_ctx = ctx->uc->tcg_ctx;
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tcg_gen_movi_tl(tcg_ctx, *(TCGv *)tcg_ctx->cpu_PC, pc);
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}
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static inline void save_cpu_state (DisasContext *ctx, int do_save_pc)
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{
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TCGContext *tcg_ctx = ctx->uc->tcg_ctx;
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LOG_DISAS("hflags %08x saved %08x\n", ctx->hflags, ctx->saved_hflags);
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if (do_save_pc && ctx->pc != ctx->saved_pc) {
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gen_save_pc(ctx, ctx->pc);
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ctx->saved_pc = ctx->pc;
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}
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if (ctx->hflags != ctx->saved_hflags) {
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tcg_gen_movi_i32(tcg_ctx, tcg_ctx->hflags, ctx->hflags);
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ctx->saved_hflags = ctx->hflags;
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switch (ctx->hflags & MIPS_HFLAG_BMASK_BASE) {
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case MIPS_HFLAG_BR:
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break;
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case MIPS_HFLAG_BC:
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case MIPS_HFLAG_BL:
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case MIPS_HFLAG_B:
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tcg_gen_movi_tl(tcg_ctx, *(TCGv *)tcg_ctx->btarget, ctx->btarget);
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break;
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}
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}
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}
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static inline void restore_cpu_state (CPUMIPSState *env, DisasContext *ctx)
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{
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ctx->saved_hflags = ctx->hflags;
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switch (ctx->hflags & MIPS_HFLAG_BMASK_BASE) {
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case MIPS_HFLAG_BR:
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break;
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case MIPS_HFLAG_BC:
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case MIPS_HFLAG_BL:
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case MIPS_HFLAG_B:
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ctx->btarget = env->btarget;
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break;
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}
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}
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static inline void
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generate_exception_err (DisasContext *ctx, int excp, int err)
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{
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TCGContext *tcg_ctx = ctx->uc->tcg_ctx;
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TCGv_i32 texcp = tcg_const_i32(tcg_ctx, excp);
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TCGv_i32 terr = tcg_const_i32(tcg_ctx, err);
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save_cpu_state(ctx, 1);
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gen_helper_raise_exception_err(tcg_ctx, tcg_ctx->cpu_env, texcp, terr);
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tcg_temp_free_i32(tcg_ctx, terr);
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tcg_temp_free_i32(tcg_ctx, texcp);
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}
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static inline void
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generate_exception (DisasContext *ctx, int excp)
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{
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TCGContext *tcg_ctx = ctx->uc->tcg_ctx;
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save_cpu_state(ctx, 1);
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gen_helper_0e0i(tcg_ctx, raise_exception, excp);
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}
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/* Addresses computation */
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static inline void gen_op_addr_add (DisasContext *ctx, TCGv ret, TCGv arg0, TCGv arg1)
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{
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