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target/arm: Add new_pc argument to helper_exception_return

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Backports commit d9f482a0279773c3253092ea149daaf00358c635 from qemu
This commit is contained in:
Richard Henderson 2019-01-22 15:48:12 -05:00 committed by Lioncash
parent 0c6f58ebc6
commit 4329ded5e2
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GPG key ID: 4E3C3CC1031BA9C7
3 changed files with 12 additions and 7 deletions
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10
qemu/target/arm/helper-a64.c
View file

@ -954,7 +954,7 @@ static int el_from_spsr(uint32_t spsr)
}
}
void HELPER(exception_return)(CPUARMState *env)
void HELPER(exception_return)(CPUARMState *env, uint64_t new_pc)
{
int cur_el = arm_current_el(env);
unsigned int spsr_idx = aarch64_banked_spsr_index(cur_el);
@ -1021,9 +1021,9 @@ void HELPER(exception_return)(CPUARMState *env)
aarch64_sync_64_to_32(env);
if (spsr & CPSR_T) {
env->regs[15] = env->elr_el[cur_el] & ~0x1;
env->regs[15] = new_pc & ~0x1;
} else {
env->regs[15] = env->elr_el[cur_el] & ~0x3;
env->regs[15] = new_pc & ~0x3;
}
qemu_log_mask(CPU_LOG_INT, "Exception return from AArch64 EL%d to "
"AArch32 EL%d PC 0x%" PRIx32 "\n",
@ -1035,7 +1035,7 @@ void HELPER(exception_return)(CPUARMState *env)
env->pstate &= ~PSTATE_SS;
}
aarch64_restore_sp(env, new_el);
env->pc = env->elr_el[cur_el];
env->pc = new_pc;
qemu_log_mask(CPU_LOG_INT, "Exception return from AArch64 EL%d to "
"AArch64 EL%d PC 0x%" PRIx64 "\n",
cur_el, new_el, env->pc);
@ -1062,7 +1062,7 @@ illegal_return:
* no change to exception level, execution state or stack pointer
*/
env->pstate |= PSTATE_IL;
env->pc = env->elr_el[cur_el];
env->pc = new_pc;
spsr &= PSTATE_NZCV | PSTATE_DAIF;
spsr |= pstate_read(env) & ~(PSTATE_NZCV | PSTATE_DAIF);
pstate_write(env, spsr);

2
qemu/target/arm/helper-a64.h
View file

@ -82,7 +82,7 @@ DEF_HELPER_2(advsimd_f16tosinth, i32, f16, ptr)
DEF_HELPER_2(advsimd_f16touinth, i32, f16, ptr)
DEF_HELPER_2(sqrt_f16, f16, f16, ptr)
DEF_HELPER_1(exception_return, void, env)
DEF_HELPER_2(exception_return, void, env, i64)
DEF_HELPER_FLAGS_3(pacia, TCG_CALL_NO_WG, i64, env, i64, i64)
DEF_HELPER_FLAGS_3(pacib, TCG_CALL_NO_WG, i64, env, i64, i64)

7
qemu/target/arm/translate-a64.c
View file

@ -2062,6 +2062,7 @@ static void disas_uncond_b_reg(DisasContext *s, uint32_t insn)
{
TCGContext *tcg_ctx = s->uc->tcg_ctx;
unsigned int opc, op2, op3, rn, op4;
TCGv_i64 dst;
opc = extract32(insn, 21, 4);
op2 = extract32(insn, 16, 5);
@ -2089,7 +2090,11 @@ static void disas_uncond_b_reg(DisasContext *s, uint32_t insn)
unallocated_encoding(s);
return;
}
gen_helper_exception_return(tcg_ctx, tcg_ctx->cpu_env);
dst = tcg_temp_new_i64(tcg_ctx);
tcg_gen_ld_i64(tcg_ctx, dst, tcg_ctx->cpu_env,
offsetof(CPUARMState, elr_el[s->current_el]));
gen_helper_exception_return(tcg_ctx, tcg_ctx->cpu_env, dst);
tcg_temp_free_i64(tcg_ctx, dst);
/* Must exit loop to check un-masked IRQs */
s->base.is_jmp = DISAS_EXIT;
return;