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arm: Move gen_set_condexec() and gen_set_pc_im() up in the file
Move the utility routines gen_set_condexec() and gen_set_pc_im() up in the file, as we will want to use them from a function placed earlier in the file than their current location. Backports commit 4d5e8c969a74c86124fc2284ea603cc6dd3c5dfa from qemu
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@ -915,6 +915,25 @@ static const uint8_t table_logic_cc[16] = {
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1, /* mvn */
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};
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static inline void gen_set_condexec(DisasContext *s)
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{
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TCGContext *tcg_ctx = s->uc->tcg_ctx;
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if (s->condexec_mask) {
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uint32_t val = (s->condexec_cond << 4) | (s->condexec_mask >> 1);
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TCGv_i32 tmp = tcg_temp_new_i32(tcg_ctx);
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tcg_gen_movi_i32(tcg_ctx, tmp, val);
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store_cpu_field(tcg_ctx, tmp, condexec_bits);
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}
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}
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static inline void gen_set_pc_im(DisasContext *s, target_ulong val)
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{
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TCGContext *tcg_ctx = s->uc->tcg_ctx;
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tcg_gen_movi_i32(tcg_ctx, tcg_ctx->cpu_R[15], val);
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}
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/* Set PC and Thumb state from an immediate address. */
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static inline void gen_bx_im(DisasContext *s, uint32_t addr)
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{
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@ -1101,12 +1120,6 @@ DO_GEN_ST(8, MO_UB)
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DO_GEN_ST(16, MO_UW)
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DO_GEN_ST(32, MO_UL)
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static inline void gen_set_pc_im(DisasContext *s, target_ulong val)
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{
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TCGContext *tcg_ctx = s->uc->tcg_ctx;
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tcg_gen_movi_i32(tcg_ctx, tcg_ctx->cpu_R[15], val);
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}
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static inline void gen_hvc(DisasContext *s, int imm16)
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{
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TCGContext *tcg_ctx = s->uc->tcg_ctx;
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@ -1142,18 +1155,6 @@ static inline void gen_smc(DisasContext *s)
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s->is_jmp = DISAS_SMC;
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}
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static inline void
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gen_set_condexec (DisasContext *s)
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{
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if (s->condexec_mask) {
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TCGContext *tcg_ctx = s->uc->tcg_ctx;
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uint32_t val = (s->condexec_cond << 4) | (s->condexec_mask >> 1);
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TCGv_i32 tmp = tcg_temp_new_i32(tcg_ctx);
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tcg_gen_movi_i32(tcg_ctx, tmp, val);
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store_cpu_field(tcg_ctx, tmp, condexec_bits);
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}
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}
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static void gen_exception_internal_insn(DisasContext *s, int offset, int excp)
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{
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gen_set_condexec(s);
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