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target/arm: Define arm_cpu_do_unaligned_access for user-only
Use the same code as system mode, so that we generate the same exception + syndrome for the unaligned access. For the moment, if MTE is enabled so that this path is reachable, this would generate a SIGSEGV in the user-only cpu_loop. Decoding the syndrome to produce the proper SIGBUS will be done later. Backports commit 0d1762e931f8a694f261c604daba605bcda70928 from qemu
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@ -2006,8 +2006,8 @@ static void arm_cpu_class_init(struct uc_struct *uc, ObjectClass *oc, void *data
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cc->tlb_fill = arm_cpu_tlb_fill;
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cc->debug_excp_handler = arm_debug_excp_handler;
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cc->debug_check_watchpoint = arm_debug_check_watchpoint;
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#if !defined(CONFIG_USER_ONLY)
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cc->do_unaligned_access = arm_cpu_do_unaligned_access;
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#if !defined(CONFIG_USER_ONLY)
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cc->do_transaction_failed = arm_cpu_do_transaction_failed;
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cc->adjust_watchpoint_address = arm_adjust_watchpoint_address;
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#endif
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@ -10,8 +10,6 @@
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#include "internals.h"
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#include "exec/exec-all.h"
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#if !defined(CONFIG_USER_ONLY)
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static inline uint32_t merge_syn_data_abort(uint32_t template_syn,
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unsigned int target_el,
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bool same_el, bool ea,
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@ -122,6 +120,8 @@ void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
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arm_deliver_fault(cpu, vaddr, access_type, mmu_idx, &fi);
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}
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#if !defined(CONFIG_USER_ONLY)
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/*
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* arm_cpu_do_transaction_failed: handle a memory system error response
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* (eg "no device/memory present at address") by raising an external abort
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