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target/mips: Clean up handling of CP0 register 19

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Clean up handling of CP0 register 19.

Backports commit be274dc18ee3682bb3a2ba7e5ccd3061b103cbec from qemu
This commit is contained in:
Aleksandar Markovic 2019-11-18 23:22:04 -05:00 committed by Lioncash
parent e126751cdc
commit 462d062240
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GPG key ID: 4E3C3CC1031BA9C7
2 changed files with 36 additions and 32 deletions
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4
qemu/target/mips/cpu.h
View file

@ -394,6 +394,10 @@ typedef struct mips_def_t mips_def_t;
#define CP0_REG19__WATCHHI1 1
#define CP0_REG19__WATCHHI2 2
#define CP0_REG19__WATCHHI3 3
#define CP0_REG19__WATCHHI4 4
#define CP0_REG19__WATCHHI5 5
#define CP0_REG19__WATCHHI6 6
#define CP0_REG19__WATCHHI7 7
/* CP0 Register 20 */
#define CP0_REG20__XCONTEXT 0
/* CP0 Register 21 */

64
qemu/target/mips/translate.c
View file

@ -7402,14 +7402,14 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case CP0_REGISTER_19:
switch (sel) {
case 0:
case 1:
case 2:
case 3:
case 4:
case 5:
case 6:
case 7:
case CP0_REG19__WATCHHI0:
case CP0_REG19__WATCHHI1:
case CP0_REG19__WATCHHI2:
case CP0_REG19__WATCHHI3:
case CP0_REG19__WATCHHI4:
case CP0_REG19__WATCHHI5:
case CP0_REG19__WATCHHI6:
case CP0_REG19__WATCHHI7:
CP0_CHECK(ctx->CP0_Config1 & (1 << CP0C1_WR));
gen_helper_1e0i(tcg_ctx, mfc0_watchhi, arg, sel);
register_name = "WatchHi";
@ -8138,14 +8138,14 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case CP0_REGISTER_19:
switch (sel) {
case 0:
case 1:
case 2:
case 3:
case 4:
case 5:
case 6:
case 7:
case CP0_REG19__WATCHHI0:
case CP0_REG19__WATCHHI1:
case CP0_REG19__WATCHHI2:
case CP0_REG19__WATCHHI3:
case CP0_REG19__WATCHHI4:
case CP0_REG19__WATCHHI5:
case CP0_REG19__WATCHHI6:
case CP0_REG19__WATCHHI7:
CP0_CHECK(ctx->CP0_Config1 & (1 << CP0C1_WR));
gen_helper_0e1i(tcg_ctx, mtc0_watchhi, arg, sel);
register_name = "WatchHi";
@ -8871,14 +8871,14 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case CP0_REGISTER_19:
switch (sel) {
case 0:
case 1:
case 2:
case 3:
case 4:
case 5:
case 6:
case 7:
case CP0_REG19__WATCHHI0:
case CP0_REG19__WATCHHI1:
case CP0_REG19__WATCHHI2:
case CP0_REG19__WATCHHI3:
case CP0_REG19__WATCHHI4:
case CP0_REG19__WATCHHI5:
case CP0_REG19__WATCHHI6:
case CP0_REG19__WATCHHI7:
CP0_CHECK(ctx->CP0_Config1 & (1 << CP0C1_WR));
gen_helper_1e0i(tcg_ctx, mfc0_watchhi, arg, sel);
register_name = "WatchHi";
@ -9585,14 +9585,14 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case CP0_REGISTER_19:
switch (sel) {
case 0:
case 1:
case 2:
case 3:
case 4:
case 5:
case 6:
case 7:
case CP0_REG19__WATCHHI0:
case CP0_REG19__WATCHHI1:
case CP0_REG19__WATCHHI2:
case CP0_REG19__WATCHHI3:
case CP0_REG19__WATCHHI4:
case CP0_REG19__WATCHHI5:
case CP0_REG19__WATCHHI6:
case CP0_REG19__WATCHHI7:
CP0_CHECK(ctx->CP0_Config1 & (1 << CP0C1_WR));
gen_helper_0e1i(tcg_ctx, mtc0_watchhi, arg, sel);
register_name = "WatchHi";