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target/arm: Fix SMMLS argument order

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The previous simplification got the order of operands to the
subtraction wrong. Since the 64-bit product is the subtrahend,
we must use a 64-bit subtract to properly compute the borrow
from the low-part of the product.

Fixes: 5f8cd06ebcf5 ("target/arm: Simplify SMMLA, SMMLAR, SMMLS, SMMLSR")

Backports commit e0a0c8322b8ebcdad674f443a3e86db8708d6738 from qemu
This commit is contained in:
Richard Henderson 2019-11-19 00:00:15 -05:00 committed by Lioncash
parent 9fb54a7f72
commit 46a8dfff59
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 18 additions and 2 deletions
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20
qemu/target/arm/translate.c
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@ -9016,7 +9016,16 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
if (rd != 15) {
tmp3 = load_reg(s, rd);
if (insn & (1 << 6)) {
tcg_gen_sub_i32(tcg_ctx, tmp, tmp, tmp3);
/*
* For SMMLS, we need a 64-bit subtract.
* Borrow caused by a non-zero multiplicand
* lowpart, and the correct result lowpart
* for rounding.
*/
TCGv_i32 zero = tcg_const_i32(tcg_ctx, 0);
tcg_gen_sub2_i32(tcg_ctx, tmp2, tmp, zero, tmp3,
tmp2, tmp);
tcg_temp_free_i32(tcg_ctx, zero);
} else {
tcg_gen_add_i32(tcg_ctx, tmp, tmp, tmp3);
}
@ -10259,7 +10268,14 @@ static void disas_thumb2_insn(DisasContext *s, uint32_t insn)
if (insn & (1 << 20)) {
tcg_gen_add_i32(tcg_ctx, tmp, tmp, tmp3);
} else {
tcg_gen_sub_i32(tcg_ctx, tmp, tmp, tmp3);
/*
* For SMMLS, we need a 64-bit subtract.
* Borrow caused by a non-zero multiplicand lowpart,
* and the correct result lowpart for rounding.
*/
TCGv_i32 zero = tcg_const_i32(tcg_ctx, 0);
tcg_gen_sub2_i32(tcg_ctx, tmp2, tmp, zero, tmp3, tmp2, tmp);
tcg_temp_free_i32(tcg_ctx, zero);
}
tcg_temp_free_i32(tcg_ctx, tmp3);
}