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softfloat: expand out STATUS_VAR

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Expand out and remove the STATUS_VAR macro.

Backports commit ff32e16e865c78fb54187723f3fd09650cd9b962 from qemu
This commit is contained in:
Peter Maydell 2018-02-12 13:36:34 -05:00 committed by Lioncash
parent 20f696343b
commit 48e9546efc
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GPG key ID: 4E3C3CC1031BA9C7
4 changed files with 607 additions and 503 deletions
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50
qemu/fpu/softfloat-specialize.h
View file

@ -257,7 +257,9 @@ static commonNaNT float16ToCommonNaN( float16 a, float_status *status)
{
commonNaNT z;
if ( float16_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR );
if (float16_is_signaling_nan(a)) {
float_raise(float_flag_invalid, status);
}
z.sign = float16_val(a) >> 15;
z.low = 0;
z.high = ((uint64_t) float16_val(a))<<54;
@ -360,7 +362,9 @@ static commonNaNT float32ToCommonNaN( float32 a, float_status *status)
{
commonNaNT z;
if ( float32_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR );
if (float32_is_signaling_nan(a)) {
float_raise(float_flag_invalid, status);
}
z.sign = float32_val(a)>>31;
z.low = 0;
z.high = ( (uint64_t) float32_val(a) )<<41;
@ -513,7 +517,7 @@ static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
* the default NaN
*/
if (infzero && cIsQNaN) {
float_raise(float_flag_invalid STATUS_VAR);
float_raise(float_flag_invalid, status);
return 3;
}
@ -542,7 +546,7 @@ static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
* the default NaN
*/
if (infzero) {
float_raise(float_flag_invalid STATUS_VAR);
float_raise(float_flag_invalid, status);
return 3;
}
@ -570,7 +574,7 @@ static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
* a default NaN
*/
if (infzero) {
float_raise(float_flag_invalid STATUS_VAR);
float_raise(float_flag_invalid, status);
return 2;
}
@ -621,7 +625,9 @@ static float32 propagateFloat32NaN( float32 a, float32 b, float_status *status)
av = float32_val(a);
bv = float32_val(b);
if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
if (aIsSignalingNaN | bIsSignalingNaN) {
float_raise(float_flag_invalid, status);
}
if ( STATUS(default_nan_mode) )
return float32_default_nan;
@ -666,12 +672,12 @@ static float32 propagateFloat32MulAddNaN(float32 a, float32 b,
cIsSignalingNaN = float32_is_signaling_nan(c);
if (aIsSignalingNaN | bIsSignalingNaN | cIsSignalingNaN) {
float_raise(float_flag_invalid STATUS_VAR);
float_raise(float_flag_invalid, status);
}
which = pickNaNMulAdd(aIsQuietNaN, aIsSignalingNaN,
bIsQuietNaN, bIsSignalingNaN,
cIsQuietNaN, cIsSignalingNaN, infzero STATUS_VAR);
cIsQuietNaN, cIsSignalingNaN, infzero, status);
if (STATUS(default_nan_mode)) {
/* Note that this check is after pickNaNMulAdd so that function
@ -771,7 +777,9 @@ static commonNaNT float64ToCommonNaN( float64 a, float_status *status)
{
commonNaNT z;
if ( float64_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR);
if (float64_is_signaling_nan(a)) {
float_raise(float_flag_invalid, status);
}
z.sign = float64_val(a)>>63;
z.low = 0;
z.high = float64_val(a)<<12;
@ -819,7 +827,9 @@ static float64 propagateFloat64NaN( float64 a, float64 b, float_status *status)
av = float64_val(a);
bv = float64_val(b);
if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
if (aIsSignalingNaN | bIsSignalingNaN) {
float_raise(float_flag_invalid, status);
}
if ( STATUS(default_nan_mode) )
return float64_default_nan;
@ -864,12 +874,12 @@ static float64 propagateFloat64MulAddNaN(float64 a, float64 b,
cIsSignalingNaN = float64_is_signaling_nan(c);
if (aIsSignalingNaN | bIsSignalingNaN | cIsSignalingNaN) {
float_raise(float_flag_invalid STATUS_VAR);
float_raise(float_flag_invalid, status);
}
which = pickNaNMulAdd(aIsQuietNaN, aIsSignalingNaN,
bIsQuietNaN, bIsSignalingNaN,
cIsQuietNaN, cIsSignalingNaN, infzero STATUS_VAR);
cIsQuietNaN, cIsSignalingNaN, infzero, status);
if (STATUS(default_nan_mode)) {
/* Note that this check is after pickNaNMulAdd so that function
@ -979,7 +989,9 @@ static commonNaNT floatx80ToCommonNaN( floatx80 a, float_status *status)
{
commonNaNT z;
if ( floatx80_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR);
if (floatx80_is_signaling_nan(a)) {
float_raise(float_flag_invalid, status);
}
if ( a.low >> 63 ) {
z.sign = a.high >> 15;
z.low = 0;
@ -1034,7 +1046,9 @@ static floatx80 propagateFloatx80NaN( floatx80 a, floatx80 b, float_status *stat
bIsQuietNaN = floatx80_is_quiet_nan( b );
bIsSignalingNaN = floatx80_is_signaling_nan( b );
if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
if (aIsSignalingNaN | bIsSignalingNaN) {
float_raise(float_flag_invalid, status);
}
if ( STATUS(default_nan_mode) ) {
a.low = floatx80_default_nan_low;
@ -1138,7 +1152,9 @@ static commonNaNT float128ToCommonNaN( float128 a, float_status *status)
{
commonNaNT z;
if ( float128_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR);
if (float128_is_signaling_nan(a)) {
float_raise(float_flag_invalid, status);
}
z.sign = a.high>>63;
shortShift128Left( a.high, a.low, 16, &z.high, &z.low );
return z;
@ -1180,7 +1196,9 @@ static float128 propagateFloat128NaN( float128 a, float128 b, float_status *stat
bIsQuietNaN = float128_is_quiet_nan( b );
bIsSignalingNaN = float128_is_signaling_nan( b );
if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
if (aIsSignalingNaN | bIsSignalingNaN) {
float_raise(float_flag_invalid, status);
}
if ( STATUS(default_nan_mode) ) {
a.low = float128_default_nan_low;

995
qemu/fpu/softfloat.c
View file

File diff suppressed because it is too large Load diff

9
qemu/include/fpu/softfloat.h
View file

@ -109,7 +109,6 @@ typedef int64_t int64;
#define LIT64( a ) a##LL
#define STATUS(field) status->field
#define STATUS_VAR , status
/*----------------------------------------------------------------------------
| Software IEC/IEEE floating-point ordering relations
@ -333,22 +332,22 @@ float128 uint64_to_float128(uint64_t, float_status *status);
/* We provide the int16 versions for symmetry of API with float-to-int */
static inline float32 int16_to_float32(int16_t v, float_status *status)
{
return int32_to_float32(v STATUS_VAR);
return int32_to_float32(v, status);
}
static inline float32 uint16_to_float32(uint16_t v, float_status *status)
{
return uint32_to_float32(v STATUS_VAR);
return uint32_to_float32(v, status);
}
static inline float64 int16_to_float64(int16_t v, float_status *status)
{
return int32_to_float64(v STATUS_VAR);
return int32_to_float64(v, status);
}
static inline float64 uint16_to_float64(uint16_t v, float_status *status)
{
return uint32_to_float64(v STATUS_VAR);
return uint32_to_float64(v, status);
}
/*----------------------------------------------------------------------------

56
qemu/target-mips/msa_helper.c
View file

@ -1618,7 +1618,7 @@ static inline float16 float16_from_float32(int32 a, flag ieee, float_status *sta
{
float16 f_val;
f_val = float32_to_float16((float32)a, ieee STATUS_VAR);
f_val = float32_to_float16((float32)a, ieee , status);
f_val = float16_maybe_silence_nan(f_val);
return a < 0 ? (f_val | (1 << 15)) : f_val;
@ -1628,7 +1628,7 @@ static inline float32 float32_from_float64(int64 a, float_status *status)
{
float32 f_val;
f_val = float64_to_float32((float64)a STATUS_VAR);
f_val = float64_to_float32((float64)a, status);
f_val = float32_maybe_silence_nan(f_val);
return a < 0 ? (f_val | (1 << 31)) : f_val;
@ -1638,7 +1638,7 @@ static inline float32 float32_from_float16(int16_t a, flag ieee, float_status *s
{
float32 f_val;
f_val = float16_to_float32((float16)a, ieee STATUS_VAR);
f_val = float16_to_float32((float16)a, ieee, status);
f_val = float32_maybe_silence_nan(f_val);
return a < 0 ? (f_val | (1 << 31)) : f_val;
@ -1648,7 +1648,7 @@ static inline float64 float64_from_float32(int32 a, float_status *status)
{
float64 f_val;
f_val = float32_to_float64((float64)a STATUS_VAR);
f_val = float32_to_float64((float64)a, status);
f_val = float64_maybe_silence_nan(f_val);
return a < 0 ? (f_val | (1ULL << 63)) : f_val;
@ -1659,8 +1659,8 @@ static inline float32 float32_from_q16(int16_t a, float_status *status)
float32 f_val;
/* conversion as integer and scaling */
f_val = int32_to_float32(a STATUS_VAR);
f_val = float32_scalbn(f_val, -15 STATUS_VAR);
f_val = int32_to_float32(a, status);
f_val = float32_scalbn(f_val, -15, status);
return f_val;
}
@ -1670,8 +1670,8 @@ static inline float64 float64_from_q32(int32 a, float_status *status)
float64 f_val;
/* conversion as integer and scaling */
f_val = int32_to_float64(a STATUS_VAR);
f_val = float64_scalbn(f_val, -31 STATUS_VAR);
f_val = int32_to_float64(a, status);
f_val = float64_scalbn(f_val, -31, status);
return f_val;
}
@ -1685,43 +1685,43 @@ static inline int16_t float32_to_q16(float32 a, float_status *status)
int ieee_ex;
if (float32_is_any_nan(a)) {
float_raise(float_flag_invalid STATUS_VAR);
float_raise(float_flag_invalid, status);
return 0;
}
/* scaling */
a = float32_scalbn(a, 15 STATUS_VAR);
a = float32_scalbn(a, 15, status);
ieee_ex = get_float_exception_flags(status);
set_float_exception_flags(ieee_ex & (~float_flag_underflow)
STATUS_VAR);
, status);
if (ieee_ex & float_flag_overflow) {
float_raise(float_flag_inexact STATUS_VAR);
float_raise(float_flag_inexact, status);
return (int32)a < 0 ? q_min : q_max;
}
/* conversion to int */
q_val = float32_to_int32(a STATUS_VAR);
q_val = float32_to_int32(a, status);
ieee_ex = get_float_exception_flags(status);
set_float_exception_flags(ieee_ex & (~float_flag_underflow)
STATUS_VAR);
, status);
if (ieee_ex & float_flag_invalid) {
set_float_exception_flags(ieee_ex & (~float_flag_invalid)
STATUS_VAR);
float_raise(float_flag_overflow | float_flag_inexact STATUS_VAR);
, status);
float_raise(float_flag_overflow | float_flag_inexact, status);
return (int32)a < 0 ? q_min : q_max;
}
if (q_val < q_min) {
float_raise(float_flag_overflow | float_flag_inexact STATUS_VAR);
float_raise(float_flag_overflow | float_flag_inexact, status);
return (int16_t)q_min;
}
if (q_max < q_val) {
float_raise(float_flag_overflow | float_flag_inexact STATUS_VAR);
float_raise(float_flag_overflow | float_flag_inexact, status);
return (int16_t)q_max;
}
@ -1737,43 +1737,43 @@ static inline int32 float64_to_q32(float64 a, float_status *status)
int ieee_ex;
if (float64_is_any_nan(a)) {
float_raise(float_flag_invalid STATUS_VAR);
float_raise(float_flag_invalid, status);
return 0;
}
/* scaling */
a = float64_scalbn(a, 31 STATUS_VAR);
a = float64_scalbn(a, 31, status);
ieee_ex = get_float_exception_flags(status);
set_float_exception_flags(ieee_ex & (~float_flag_underflow)
STATUS_VAR);
, status);
if (ieee_ex & float_flag_overflow) {
float_raise(float_flag_inexact STATUS_VAR);
float_raise(float_flag_inexact, status);
return (int64)a < 0 ? q_min : q_max;
}
/* conversion to integer */
q_val = float64_to_int64(a STATUS_VAR);
q_val = float64_to_int64(a, status);
ieee_ex = get_float_exception_flags(status);
set_float_exception_flags(ieee_ex & (~float_flag_underflow)
STATUS_VAR);
, status);
if (ieee_ex & float_flag_invalid) {
set_float_exception_flags(ieee_ex & (~float_flag_invalid)
STATUS_VAR);
float_raise(float_flag_overflow | float_flag_inexact STATUS_VAR);
, status);
float_raise(float_flag_overflow | float_flag_inexact, status);
return (int64)a < 0 ? q_min : q_max;
}
if (q_val < q_min) {
float_raise(float_flag_overflow | float_flag_inexact STATUS_VAR);
float_raise(float_flag_overflow | float_flag_inexact, status);
return (int32)q_min;
}
if (q_max < q_val) {
float_raise(float_flag_overflow | float_flag_inexact STATUS_VAR);
float_raise(float_flag_overflow | float_flag_inexact, status);
return (int32)q_max;
}